#! /c/Source/iverilog-install/bin/vvp
:ivl_version "12.0 (devel)" "(s20150603-1539-g2693dd32b)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision + 0;
:vpi_module "C:\iverilog\lib\ivl\system.vpi";
:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi";
:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi";
:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi";
:vpi_module "C:\iverilog\lib\ivl\va_math.vpi";
S_000001ec955469d0 .scope module, "led" "led" 2 1;
 .timescale 0 0;
    .port_info 0 /INPUT 1 "key";
    .port_info 1 /OUTPUT 1 "led";
o000001ec95426728 .functor BUFZ 1, C4<z>; HiZ drive
v000001ec95546f00_0 .net "key", 0 0, o000001ec95426728;  0 drivers
v000001ec95547190_0 .var "led", 0 0;
E_000001ec95424d90 .event anyedge, v000001ec95546f00_0;
    .scope S_000001ec955469d0;
T_0 ;
    %wait E_000001ec95424d90;
    %load/vec4 v000001ec95546f00_0;
    %nor/r;
    %store/vec4 v000001ec95547190_0, 0, 1;
    %jmp T_0;
    .thread T_0, $push;
# The file index is used to find the file name in the following table.
:file_names 3;
    "N/A";
    "<interactive>";
    "led.v";
