From 1d52bd68f8630a2a05de3efe15c7c97ff528b0fe Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E9=98=B3=E5=85=89=E5=B0=91=E5=B9=B4?= <849317537@qq.com>
Date: Thu, 16 May 2024 10:55:09 +0800
Subject: [PATCH] =?UTF-8?q?=E5=91=BC=E5=90=B8=E7=81=AF=20=E4=BB=BF?=
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---
 led_matrix/bln.v     | 118 +++++++++++++++++++++++++++++++++++++++++++
 led_matrix/bln.v.out |  55 ++++++++++++++++++++
 2 files changed, 173 insertions(+)
 create mode 100644 led_matrix/bln.v
 create mode 100755 led_matrix/bln.v.out

diff --git a/led_matrix/bln.v b/led_matrix/bln.v
new file mode 100644
index 0000000..677db7c
--- /dev/null
+++ b/led_matrix/bln.v
@@ -0,0 +1,118 @@
+// 呼吸灯实验
+
+`timescale 1ns/1ns
+module tb_bln();
+
+reg sys_clk;
+reg sys_rst;
+
+always #10 sys_clk = ~sys_clk;
+
+
+
+// parameter ns_max = 10'b110_0100;      // 100次
+// parameter us_max = 10'b11_1110_1000;  // 1000次
+// parameter ms_max = 10'b11_1110_1000;  // 1000次
+
+parameter ns_max = 10'b110_0100 >> 3;  // 12
+parameter us_max = 10'b11_1110_1000 >> 6;  // 15
+parameter ms_max = 10'b11_1110_1000 >> 6;  // 15
+
+initial begin
+    sys_clk <= 1'b0;
+    
+    sys_rst <= 1'b0;
+    sys_rst <= 1'b1;
+end
+
+
+reg [9:0] ns_cnt;
+always @(posedge sys_clk or negedge sys_rst) begin
+    if (sys_rst == 1'b0) begin
+        ns_cnt <= 10'b0;
+    end
+    // 到了2us整 (每个时钟周期20ns, 当前已经100个20ns了 清零吧)
+    else if (ns_cnt == ns_max - 10'b1) begin  
+        ns_cnt <= 10'b0;
+    end
+    else begin
+        ns_cnt <= ns_cnt + 10'b1;
+    end
+end
+
+
+reg [9:0] us_cnt;
+always @(posedge sys_clk or negedge sys_rst) begin
+    if (sys_rst == 1'b0) begin
+        us_cnt <= 10'b0;
+    end
+    // 到了2ms整
+    else if ((us_cnt == us_max - 10'b1) && (ns_cnt == ns_max - 10'b1)) begin
+        us_cnt <= 10'b0;
+    end
+    // 到了2us整
+    else if (ns_cnt == ns_max - 10'b1) begin
+        us_cnt <= us_cnt + 10'b1;
+    end
+    else begin
+        us_cnt <= us_cnt;
+    end
+end
+
+
+reg [9:0] ms_cnt;
+always @(posedge sys_clk or negedge sys_rst) begin
+    if (sys_rst == 1'b0) begin
+        ms_cnt <= 10'b0;
+    end
+    // 到了2s整 清零
+    else if ((ms_cnt == ms_max - 10'b1) && (us_cnt == us_max - 10'b1) && (ns_cnt == ns_max - 10'b1)) begin
+        ms_cnt <= 10'b0;
+    end
+    // 到了2ms整
+    else if ((us_cnt == us_max - 10'b1) && (ns_cnt == ns_max - 10'b1)) begin
+        ms_cnt <= ms_cnt + 10'b1;
+    end
+    else begin
+        ms_cnt <= ms_cnt;
+    end
+end
+
+
+reg flag;  // 2s切换一下状态
+always @(posedge sys_clk or negedge sys_rst) begin
+    if (sys_rst == 1'b0) begin
+        flag <= 1'b0;
+    end
+    else if ((ms_cnt == ms_max - 10'b1) && (us_cnt == us_max - 10'b1) && (ns_cnt == ns_max - 10'b1)) begin
+        flag <= !flag;
+    end
+    else begin
+        flag <= flag;
+    end
+end
+
+reg [7:0]x;
+reg [7:0]y;
+always @(posedge sys_clk or negedge sys_rst) begin
+    if (sys_rst == 1'b0) begin
+        x <= 8'b0000_0000;
+        y <= 8'b1111_1111;
+    end
+    else begin
+    end
+    case({flag, us_cnt <= ms_cnt})
+        2'b01: x <= 8'b0000_0001;
+        2'b00: x <= 8'b0000_0000;
+        2'b11: x <= 8'b0000_0000;
+        2'b10: x <= 8'b0000_0001;
+        default ;
+    endcase
+end
+
+endmodule
+
+
+
+
+
diff --git a/led_matrix/bln.v.out b/led_matrix/bln.v.out
new file mode 100755
index 0000000..493de17
--- /dev/null
+++ b/led_matrix/bln.v.out
@@ -0,0 +1,55 @@
+#! /usr/local/Cellar/icarus-verilog/12.0/bin/vvp
+:ivl_version "12.0 (stable)";
+:ivl_delay_selection "TYPICAL";
+:vpi_time_precision - 9;
+:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/system.vpi";
+:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/vhdl_sys.vpi";
+:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/vhdl_textio.vpi";
+:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/v2005_math.vpi";
+:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/va_math.vpi";
+S_0x7fab599063f0 .scope module, "tb_bln" "tb_bln" 2 6;
+ .timescale -9 -9;
+v0x7fab59905560_0 .var "sys_clk", 0 0;
+v0x7fab59916410_0 .var "sys_rst", 0 0;
+v0x7fab599164b0_0 .var "x", 7 0;
+v0x7fab59916550_0 .var "y", 7 0;
+E_0x7fab59905ca0/0 .event negedge, v0x7fab59916410_0;
+E_0x7fab59905ca0/1 .event posedge, v0x7fab59905560_0;
+E_0x7fab59905ca0 .event/or E_0x7fab59905ca0/0, E_0x7fab59905ca0/1;
+    .scope S_0x7fab599063f0;
+T_0 ;
+    %delay 10, 0;
+    %load/vec4 v0x7fab59905560_0;
+    %inv;
+    %store/vec4 v0x7fab59905560_0, 0, 1;
+    %jmp T_0;
+    .thread T_0;
+    .scope S_0x7fab599063f0;
+T_1 ;
+    %pushi/vec4 0, 0, 1;
+    %assign/vec4 v0x7fab59905560_0, 0;
+    %pushi/vec4 0, 0, 1;
+    %assign/vec4 v0x7fab59916410_0, 0;
+    %delay 200, 0;
+    %pushi/vec4 1, 0, 1;
+    %assign/vec4 v0x7fab59916410_0, 0;
+    %end;
+    .thread T_1;
+    .scope S_0x7fab599063f0;
+T_2 ;
+    %wait E_0x7fab59905ca0;
+    %load/vec4 v0x7fab59916410_0;
+    %cmpi/e 0, 0, 1;
+    %jmp/0xz  T_2.0, 4;
+    %pushi/vec4 0, 0, 8;
+    %assign/vec4 v0x7fab599164b0_0, 0;
+    %pushi/vec4 255, 0, 8;
+    %assign/vec4 v0x7fab59916550_0, 0;
+T_2.0 ;
+    %jmp T_2;
+    .thread T_2;
+# The file index is used to find the file name in the following table.
+:file_names 3;
+    "N/A";
+    "<interactive>";
+    "bln.v";