From 325759f704535ac899fff1ba39c6d113445e537f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=E9=98=B3=E5=85=89=E5=B0=91=E5=B9=B4?= <849317537@qq.com> Date: Mon, 13 May 2024 18:33:35 +0800 Subject: [PATCH] =?UTF-8?q?=E7=A7=BB=E4=BD=8D=E6=95=B0=E7=A0=81=E7=AE=A1,?= =?UTF-8?q?=20=E4=BB=BF=E7=9C=9F=E9=80=9A=E8=BF=87=E5=95=A6~?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .DS_Store | Bin 0 -> 6148 bytes .vscode/settings.json | 3 +- digital_tube/dt.v.out | 433 ++++++++++++++++++++++++++++++++++++------ digital_tube/tb_dt.v | 70 +++++++ led/tb_led.v | 3 +- 5 files changed, 454 insertions(+), 55 deletions(-) create mode 100644 .DS_Store create mode 100644 digital_tube/tb_dt.v diff --git a/.DS_Store b/.DS_Store new file mode 100644 index 0000000000000000000000000000000000000000..5a8f0292041e24c2e261a27c60311290b9d25995 GIT binary patch literal 6148 zcmeHKJ8DBg3>+mc3`yZK}1=KIw>Fat29JL2GBY<})Ova8A%k3} ztUs6UyY1UEy`g% zQBev=fl~#pb360?|3JSm|DTeylLAuUUnyXd#d0y{D^+hDy`1;jMt`Dv&5`cLbx;_h l9TTG+bK~v!E{d|Q`I_gwa7YX~^Fb%-XTWulNrAss;0uz^7HR+h literal 0 HcmV?d00001 diff --git a/.vscode/settings.json b/.vscode/settings.json index 0acacd4..7414483 100644 --- a/.vscode/settings.json +++ b/.vscode/settings.json @@ -1,3 +1,4 @@ { - "digital-ide.welcome.show": false + "digital-ide.welcome.show": false, + "digital-ide.dont-show-again.propose.issue": true } \ No newline at end of file diff --git a/digital_tube/dt.v.out b/digital_tube/dt.v.out index b2982bf..d4c397d 100755 --- a/digital_tube/dt.v.out +++ b/digital_tube/dt.v.out @@ -7,7 +7,7 @@ :vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/vhdl_textio.vpi"; :vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/v2005_math.vpi"; :vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/va_math.vpi"; -S_0x7ff79e706d30 .scope module, "dt" "dt" 2 4; +S_0x7fafabf07660 .scope module, "dt" "dt" 2 4; .timescale 0 0; .port_info 0 /INPUT 8 "data"; .port_info 1 /OUTPUT 1 "A"; @@ -22,73 +22,400 @@ S_0x7ff79e706d30 .scope module, "dt" "dt" 2 4; .port_info 10 /OUTPUT 1 "S2"; .port_info 11 /OUTPUT 1 "S3"; .port_info 12 /OUTPUT 1 "S4"; -P_0x7ff79e808e00 .param/l "SELECTOR" 0 2 15, C4<0111101111011110>; -P_0x7ff79e808e40 .param/l "SHOW" 0 2 37, C4<01111111011111110111111101111111011111110111111101111111011111110111111101111111011111110011001101111001011011010011000001111111>; -P_0x7ff79e808e80 .param/l "_SELECT_1" 0 2 10, C4<1110>; -P_0x7ff79e808ec0 .param/l "_SELECT_2" 0 2 11, C4<1101>; -P_0x7ff79e808f00 .param/l "_SELECT_3" 0 2 12, C4<1011>; -P_0x7ff79e808f40 .param/l "_SELECT_4" 0 2 13, C4<0111>; -P_0x7ff79e808f80 .param/l "_SHOW_0" 0 2 19, C4<01111111>; -P_0x7ff79e808fc0 .param/l "_SHOW_1" 0 2 20, C4<00110000>; -P_0x7ff79e809000 .param/l "_SHOW_2" 0 2 21, C4<01101101>; -P_0x7ff79e809040 .param/l "_SHOW_3" 0 2 22, C4<01111001>; -P_0x7ff79e809080 .param/l "_SHOW_4" 0 2 23, C4<00110011>; -P_0x7ff79e8090c0 .param/l "_SHOW_5" 0 2 24, C4<01111111>; -P_0x7ff79e809100 .param/l "_SHOW_6" 0 2 25, C4<01111111>; -P_0x7ff79e809140 .param/l "_SHOW_7" 0 2 26, C4<01111111>; -P_0x7ff79e809180 .param/l "_SHOW_8" 0 2 27, C4<01111111>; -P_0x7ff79e8091c0 .param/l "_SHOW_9" 0 2 28, C4<01111111>; -P_0x7ff79e809200 .param/l "_SHOW_A" 0 2 29, C4<01111111>; -P_0x7ff79e809240 .param/l "_SHOW_B" 0 2 30, C4<01111111>; -P_0x7ff79e809280 .param/l "_SHOW_C" 0 2 31, C4<01111111>; -P_0x7ff79e8092c0 .param/l "_SHOW_D" 0 2 32, C4<01111111>; -P_0x7ff79e809300 .param/l "_SHOW_E" 0 2 33, C4<01111111>; -P_0x7ff79e809340 .param/l "_SHOW_F" 0 2 34, C4<01111111>; -v0x7ff79e707690_0 .var "A", 0 0; -v0x7ff79e717740_0 .var "B", 0 0; -v0x7ff79e7177e0_0 .var "C", 0 0; -v0x7ff79e717870_0 .var "D", 0 0; -v0x7ff79e717910_0 .var "DP", 0 0; -v0x7ff79e7179f0_0 .var "E", 0 0; -v0x7ff79e717a90_0 .var "F", 0 0; -v0x7ff79e717b30_0 .var "G", 0 0; -v0x7ff79e717bd0_0 .var "S1", 0 0; -v0x7ff79e717ce0_0 .var "S2", 0 0; -v0x7ff79e717d70_0 .var "S3", 0 0; -v0x7ff79e717e10_0 .var "S4", 0 0; -o0x7ff79f332248 .functor BUFZ 8, C4; HiZ drive -v0x7ff79e717eb0_0 .net "data", 7 0, o0x7ff79f332248; 0 drivers -E_0x7ff79e707650 .event anyedge, v0x7ff79e717eb0_0; - .scope S_0x7ff79e706d30; +P_0x7fafac009e00 .param/l "_SHOW_0" 0 2 12, C4<01111110>; +P_0x7fafac009e40 .param/l "_SHOW_1" 0 2 13, C4<00110000>; +P_0x7fafac009e80 .param/l "_SHOW_2" 0 2 14, C4<01101101>; +P_0x7fafac009ec0 .param/l "_SHOW_3" 0 2 15, C4<01111001>; +P_0x7fafac009f00 .param/l "_SHOW_4" 0 2 16, C4<00110011>; +P_0x7fafac009f40 .param/l "_SHOW_5" 0 2 17, C4<01011011>; +P_0x7fafac009f80 .param/l "_SHOW_6" 0 2 18, C4<01011111>; +P_0x7fafac009fc0 .param/l "_SHOW_7" 0 2 19, C4<01110000>; +P_0x7fafac00a000 .param/l "_SHOW_8" 0 2 20, C4<01111111>; +P_0x7fafac00a040 .param/l "_SHOW_9" 0 2 21, C4<01111101>; +P_0x7fafac00a080 .param/l "_SHOW_A" 0 2 22, C4<01110111>; +P_0x7fafac00a0c0 .param/l "_SHOW_B" 0 2 23, C4<00011111>; +P_0x7fafac00a100 .param/l "_SHOW_C" 0 2 24, C4<01001110>; +P_0x7fafac00a140 .param/l "_SHOW_D" 0 2 25, C4<00111101>; +P_0x7fafac00a180 .param/l "_SHOW_E" 0 2 26, C4<01001111>; +P_0x7fafac00a1c0 .param/l "_SHOW_F" 0 2 27, C4<01000111>; +v0x7fafabf07e00_0 .var "A", 0 0; +v0x7fafacc12d80_0 .var "B", 0 0; +v0x7fafacc12e30_0 .var "C", 0 0; +v0x7fafacc12ee0_0 .var "D", 0 0; +v0x7fafacc12f80_0 .var "DP", 0 0; +v0x7fafacc13060_0 .var "E", 0 0; +v0x7fafacc13100_0 .var "F", 0 0; +v0x7fafacc131a0_0 .var "G", 0 0; +v0x7fafacc13240_0 .var "S1", 0 0; +v0x7fafacc13350_0 .var "S2", 0 0; +v0x7fafacc133e0_0 .var "S3", 0 0; +v0x7fafacc13480_0 .var "S4", 0 0; +L_0x7fafac963008 .functor BUFT 1, C4<10>, C4<0>, C4<0>, C4<0>; +v0x7fafacc13520_0 .net/2u *"_ivl_2", 1 0, L_0x7fafac963008; 1 drivers +v0x7fafacc135d0_0 .net "a", 4 0, L_0x7fafacc13870; 1 drivers +o0x7fafac9322a8 .functor BUFZ 8, C4; HiZ drive +v0x7fafacc13680_0 .net "data", 7 0, o0x7fafac9322a8; 0 drivers +E_0x7fafabf07dc0 .event anyedge, v0x7fafacc13680_0; +L_0x7fafacc13870 .part/pv L_0x7fafac963008, 1, 2, 5; + .scope S_0x7fafabf07660; T_0 ; - %wait E_0x7ff79e707650; - %load/vec4 v0x7ff79e717eb0_0; + %wait E_0x7fafabf07dc0; + %load/vec4 v0x7fafacc13680_0; + %parti/s 1, 4, 4; + %store/vec4 v0x7fafacc12f80_0, 0, 1; + %load/vec4 v0x7fafacc13680_0; %parti/s 4, 0, 2; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; %jmp/1 T_0.0, 6; - %jmp T_0.1; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_0.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_0.2, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_0.3, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_0.4, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_0.5, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_0.6, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_0.7, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_0.8, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_0.9, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_0.10, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_0.11, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_0.12, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_0.13, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_0.14, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_0.15, 6; + %jmp T_0.17; T_0.0 ; - %pushi/vec4 127, 0, 8; + %pushi/vec4 126, 0, 7; %split/vec4 1; - %store/vec4 v0x7ff79e717910_0, 0, 1; + %store/vec4 v0x7fafacc131a0_0, 0, 1; %split/vec4 1; - %store/vec4 v0x7ff79e717b30_0, 0, 1; + %store/vec4 v0x7fafacc13100_0, 0, 1; %split/vec4 1; - %store/vec4 v0x7ff79e717a90_0, 0, 1; + %store/vec4 v0x7fafacc13060_0, 0, 1; %split/vec4 1; - %store/vec4 v0x7ff79e7179f0_0, 0, 1; + %store/vec4 v0x7fafacc12ee0_0, 0, 1; %split/vec4 1; - %store/vec4 v0x7ff79e717870_0, 0, 1; + %store/vec4 v0x7fafacc12e30_0, 0, 1; %split/vec4 1; - %store/vec4 v0x7ff79e7177e0_0, 0, 1; - %split/vec4 1; - %store/vec4 v0x7ff79e717740_0, 0, 1; - %store/vec4 v0x7ff79e707690_0, 0, 1; - %jmp T_0.1; + %store/vec4 v0x7fafacc12d80_0, 0, 1; + %store/vec4 v0x7fafabf07e00_0, 0, 1; + %jmp T_0.17; T_0.1 ; + %pushi/vec4 48, 0, 7; + %split/vec4 1; + %store/vec4 v0x7fafacc131a0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13100_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13060_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12ee0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12e30_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12d80_0, 0, 1; + %store/vec4 v0x7fafabf07e00_0, 0, 1; + %jmp T_0.17; +T_0.2 ; + %pushi/vec4 109, 0, 7; + %split/vec4 1; + %store/vec4 v0x7fafacc131a0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13100_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13060_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12ee0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12e30_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12d80_0, 0, 1; + %store/vec4 v0x7fafabf07e00_0, 0, 1; + %jmp T_0.17; +T_0.3 ; + %pushi/vec4 121, 0, 7; + %split/vec4 1; + %store/vec4 v0x7fafacc131a0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13100_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13060_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12ee0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12e30_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12d80_0, 0, 1; + %store/vec4 v0x7fafabf07e00_0, 0, 1; + %jmp T_0.17; +T_0.4 ; + %pushi/vec4 51, 0, 7; + %split/vec4 1; + %store/vec4 v0x7fafacc131a0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13100_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13060_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12ee0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12e30_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12d80_0, 0, 1; + %store/vec4 v0x7fafabf07e00_0, 0, 1; + %jmp T_0.17; +T_0.5 ; + %pushi/vec4 91, 0, 7; + %split/vec4 1; + %store/vec4 v0x7fafacc131a0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13100_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13060_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12ee0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12e30_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12d80_0, 0, 1; + %store/vec4 v0x7fafabf07e00_0, 0, 1; + %jmp T_0.17; +T_0.6 ; + %pushi/vec4 95, 0, 7; + %split/vec4 1; + %store/vec4 v0x7fafacc131a0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13100_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13060_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12ee0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12e30_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12d80_0, 0, 1; + %store/vec4 v0x7fafabf07e00_0, 0, 1; + %jmp T_0.17; +T_0.7 ; + %pushi/vec4 112, 0, 7; + %split/vec4 1; + %store/vec4 v0x7fafacc131a0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13100_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13060_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12ee0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12e30_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12d80_0, 0, 1; + %store/vec4 v0x7fafabf07e00_0, 0, 1; + %jmp T_0.17; +T_0.8 ; + %pushi/vec4 127, 0, 7; + %split/vec4 1; + %store/vec4 v0x7fafacc131a0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13100_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13060_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12ee0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12e30_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12d80_0, 0, 1; + %store/vec4 v0x7fafabf07e00_0, 0, 1; + %jmp T_0.17; +T_0.9 ; + %pushi/vec4 125, 0, 7; + %split/vec4 1; + %store/vec4 v0x7fafacc131a0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13100_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13060_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12ee0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12e30_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12d80_0, 0, 1; + %store/vec4 v0x7fafabf07e00_0, 0, 1; + %jmp T_0.17; +T_0.10 ; + %pushi/vec4 119, 0, 7; + %split/vec4 1; + %store/vec4 v0x7fafacc131a0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13100_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13060_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12ee0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12e30_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12d80_0, 0, 1; + %store/vec4 v0x7fafabf07e00_0, 0, 1; + %jmp T_0.17; +T_0.11 ; + %pushi/vec4 31, 0, 7; + %split/vec4 1; + %store/vec4 v0x7fafacc131a0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13100_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13060_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12ee0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12e30_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12d80_0, 0, 1; + %store/vec4 v0x7fafabf07e00_0, 0, 1; + %jmp T_0.17; +T_0.12 ; + %pushi/vec4 78, 0, 7; + %split/vec4 1; + %store/vec4 v0x7fafacc131a0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13100_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13060_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12ee0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12e30_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12d80_0, 0, 1; + %store/vec4 v0x7fafabf07e00_0, 0, 1; + %jmp T_0.17; +T_0.13 ; + %pushi/vec4 61, 0, 7; + %split/vec4 1; + %store/vec4 v0x7fafacc131a0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13100_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13060_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12ee0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12e30_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12d80_0, 0, 1; + %store/vec4 v0x7fafabf07e00_0, 0, 1; + %jmp T_0.17; +T_0.14 ; + %pushi/vec4 79, 0, 7; + %split/vec4 1; + %store/vec4 v0x7fafacc131a0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13100_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13060_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12ee0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12e30_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12d80_0, 0, 1; + %store/vec4 v0x7fafabf07e00_0, 0, 1; + %jmp T_0.17; +T_0.15 ; + %pushi/vec4 71, 0, 7; + %split/vec4 1; + %store/vec4 v0x7fafacc131a0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13100_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13060_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12ee0_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12e30_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc12d80_0, 0, 1; + %store/vec4 v0x7fafabf07e00_0, 0, 1; + %jmp T_0.17; +T_0.17 ; %pop/vec4 1; + %load/vec4 v0x7fafacc13680_0; + %parti/s 1, 7, 4; + %flag_set/vec4 8; + %jmp/0xz T_0.18, 8; + %pushi/vec4 1, 0, 4; + %load/vec4 v0x7fafacc13680_0; + %parti/s 2, 5, 4; + %ix/vec4 4; + %shiftl 4; + %inv; + %split/vec4 1; + %store/vec4 v0x7fafacc13240_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13350_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc133e0_0, 0, 1; + %store/vec4 v0x7fafacc13480_0, 0, 1; + %jmp T_0.19; +T_0.18 ; + %pushi/vec4 15, 0, 4; + %split/vec4 1; + %store/vec4 v0x7fafacc13240_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc13350_0, 0, 1; + %split/vec4 1; + %store/vec4 v0x7fafacc133e0_0, 0, 1; + %store/vec4 v0x7fafacc13480_0, 0, 1; +T_0.19 ; %jmp T_0; .thread T_0, $push; # The file index is used to find the file name in the following table. diff --git a/digital_tube/tb_dt.v b/digital_tube/tb_dt.v new file mode 100644 index 0000000..b3ab60b --- /dev/null +++ b/digital_tube/tb_dt.v @@ -0,0 +1,70 @@ +`timescale 1ns/1ns +module tb_dt(); + +reg sys_clk; +reg sys_rst; + +initial begin + sys_clk <= 1'b0; + // 复位 + sys_rst <= 1'b0; + #200 + // 结束复位 + sys_rst <= 1'b1; +end + +// 每20ns 产生一个时钟周期, 所以需要10ns 翻转一次 +always #10 sys_clk = ~sys_clk; + + +reg [25:0] CNT; + +always @(posedge sys_clk or negedge sys_rst) begin + if (sys_rst == 1'b0) begin + CNT <= 25'd0; + end + else if (CNT < (25'd25 - 25'd1)) begin + CNT <= CNT + 25'd1; + end + else begin + CNT <= 25'b0; + end +end + + + +reg [7:0] data; +always @(posedge sys_clk or negedge sys_rst) begin + if (sys_rst == 1'b0) begin + data <= 8'b1_00_0_0000; + end + else if (CNT == (25'd25 - 25'd1)) begin + data[3:0] <= data[3:0] + 4'b1; + data[6:5] <= data[6:5] + 2'b1; + end + else begin + + end +end + + +wire [7:0] D; +wire [3:0] S; + +dt u_dt( + .data (data), + .A (D[0]), + .B (D[1]), + .C (D[2]), + .D (D[3]), + .E (D[4]), + .F (D[5]), + .G (D[6]), + .DP (D[7]), + .S1 (S[0]), + .S2 (S[1]), + .S3 (S[2]), + .S4 (S[3]) +); + +endmodule \ No newline at end of file diff --git a/led/tb_led.v b/led/tb_led.v index b22288a..fc612c3 100644 --- a/led/tb_led.v +++ b/led/tb_led.v @@ -1,5 +1,6 @@ -module tb_led (); `timescale 1ns/1ns // 睡眠的 单位/精度 +module tb_led (); + reg tb_key; // 定义内内部的信号 设置为寄存器类型(按键是在 initial 语句中赋值, 以使用寄存器类型) wire tb_led; // 定义内部的输出信号, 使用 wire 类型