From 58378a33e38744b76ce811da982122dc6a7e248b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=E9=98=B3=E5=85=89=E5=B0=91=E5=B9=B4?= <849317537@qq.com> Date: Thu, 16 May 2024 20:22:40 +0800 Subject: [PATCH] =?UTF-8?q?=E4=BF=AE=E6=94=B9rambug?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- ip_1_port_ram/tb_ram.v | 7 +- ip_1_port_ram/tb_ram.v.out | 204 +++++++++++++++++++------------------ 2 files changed, 110 insertions(+), 101 deletions(-) diff --git a/ip_1_port_ram/tb_ram.v b/ip_1_port_ram/tb_ram.v index 00481fa..63cb05c 100644 --- a/ip_1_port_ram/tb_ram.v +++ b/ip_1_port_ram/tb_ram.v @@ -61,12 +61,11 @@ always @(posedge sys_clk or negedge sys_rst) begin if (!sys_rst) begin ram_addr <= 3'b0; end - // 没有启用ram禁止计数 - else if (ram_en == 1'b0 && ram_addr == 3'b111) begin - ram_addr <= 3'b0; + else if (ram_en && ram_addr < 3'b111) begin + ram_addr <= ram_addr + 3'b1; end else begin - ram_addr <= ram_addr + 3'b1; + ram_addr <= 3'b0; end end diff --git a/ip_1_port_ram/tb_ram.v.out b/ip_1_port_ram/tb_ram.v.out index 754c785..159672c 100755 --- a/ip_1_port_ram/tb_ram.v.out +++ b/ip_1_port_ram/tb_ram.v.out @@ -1,151 +1,161 @@ -#! /usr/local/Cellar/icarus-verilog/12.0/bin/vvp -:ivl_version "12.0 (stable)"; +#! /c/Source/iverilog-install/bin/vvp +:ivl_version "12.0 (devel)" "(s20150603-1539-g2693dd32b)"; :ivl_delay_selection "TYPICAL"; :vpi_time_precision - 9; -:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/system.vpi"; -:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/vhdl_sys.vpi"; -:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/vhdl_textio.vpi"; -:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/v2005_math.vpi"; -:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/va_math.vpi"; -S_0x7fe52f706430 .scope module, "tb_ram" "tb_ram" 2 2; +:vpi_module "C:\iverilog\lib\ivl\system.vpi"; +:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; +:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; +:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; +:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; +S_000001463bb446c0 .scope module, "tb_ram" "tb_ram" 2 2; .timescale -9 -9; -L_0x7fe52f716d40 .functor AND 1, v0x7fe52f716950_0, L_0x7fe52f716c60, C4<1>, C4<1>; -L_0x7fe530163008 .functor BUFT 1, C4<00000111>, C4<0>, C4<0>, C4<0>; -v0x7fe52f7065b0_0 .net/2u *"_ivl_0", 7 0, L_0x7fe530163008; 1 drivers -v0x7fe52f716670_0 .net *"_ivl_2", 0 0, L_0x7fe52f716c60; 1 drivers -v0x7fe52f716710_0 .var "counter", 7 0; -v0x7fe52f7167b0_0 .var "ram_addr", 2 0; -v0x7fe52f716860_0 .var "ram_data", 2 0; -v0x7fe52f716950_0 .var "ram_en", 0 0; -v0x7fe52f7169f0_0 .net "ram_rw", 0 0, L_0x7fe52f716d40; 1 drivers -v0x7fe52f716a90_0 .var "sys_clk", 0 0; -v0x7fe52f716b30_0 .var "sys_rst", 0 0; -E_0x7fe52f706320/0 .event negedge, v0x7fe52f716b30_0; -E_0x7fe52f706320/1 .event posedge, v0x7fe52f716a90_0; -E_0x7fe52f706320 .event/or E_0x7fe52f706320/0, E_0x7fe52f706320/1; -L_0x7fe52f716c60 .cmp/ge 8, L_0x7fe530163008, v0x7fe52f716710_0; - .scope S_0x7fe52f706430; +L_000001463bb0a5a0 .functor AND 1, v000001463bb9e8c0_0, L_000001463bbe6b50, C4<1>, C4<1>; +L_000001463bb9eb48 .functor BUFT 1, C4<00000111>, C4<0>, C4<0>, C4<0>; +v000001463bb09810_0 .net/2u *"_ivl_0", 7 0, L_000001463bb9eb48; 1 drivers +v000001463bb06790_0 .net *"_ivl_2", 0 0, L_000001463bbe6b50; 1 drivers +v000001463bb098b0_0 .var "counter", 7 0; +v000001463bb09950_0 .var "ram_addr", 2 0; +v000001463bb9e820_0 .var "ram_data", 2 0; +v000001463bb9e8c0_0 .var "ram_en", 0 0; +v000001463bb9e960_0 .net "ram_rw", 0 0, L_000001463bb0a5a0; 1 drivers +v000001463bb9ea00_0 .var "sys_clk", 0 0; +v000001463bb9eaa0_0 .var "sys_rst", 0 0; +E_000001463bb5a060/0 .event negedge, v000001463bb9eaa0_0; +E_000001463bb5a060/1 .event posedge, v000001463bb9ea00_0; +E_000001463bb5a060 .event/or E_000001463bb5a060/0, E_000001463bb5a060/1; +L_000001463bbe6b50 .cmp/ge 8, L_000001463bb9eb48, v000001463bb098b0_0; + .scope S_000001463bb446c0; T_0 ; %delay 10, 0; - %load/vec4 v0x7fe52f716a90_0; + %load/vec4 v000001463bb9ea00_0; %inv; - %store/vec4 v0x7fe52f716a90_0, 0, 1; + %store/vec4 v000001463bb9ea00_0, 0, 1; %jmp T_0; .thread T_0; - .scope S_0x7fe52f706430; + .scope S_000001463bb446c0; T_1 ; - %wait E_0x7fe52f706320; - %load/vec4 v0x7fe52f716b30_0; - %nor/r; - %flag_set/vec4 8; - %jmp/0xz T_1.0, 8; %pushi/vec4 0, 0, 1; - %assign/vec4 v0x7fe52f716950_0, 0; - %jmp T_1.1; -T_1.0 ; + %assign/vec4 v000001463bb9ea00_0, 0; + %pushi/vec4 0, 0, 1; + %assign/vec4 v000001463bb9eaa0_0, 0; + %delay 50, 0; %pushi/vec4 1, 0, 1; - %assign/vec4 v0x7fe52f716950_0, 0; -T_1.1 ; - %jmp T_1; + %assign/vec4 v000001463bb9eaa0_0, 0; + %end; .thread T_1; - .scope S_0x7fe52f706430; + .scope S_000001463bb446c0; T_2 ; - %wait E_0x7fe52f706320; - %load/vec4 v0x7fe52f716b30_0; + %wait E_000001463bb5a060; + %load/vec4 v000001463bb9eaa0_0; %nor/r; %flag_set/vec4 8; %jmp/0xz T_2.0, 8; - %pushi/vec4 0, 0, 8; - %assign/vec4 v0x7fe52f716710_0, 0; + %pushi/vec4 0, 0, 1; + %assign/vec4 v000001463bb9e8c0_0, 0; %jmp T_2.1; T_2.0 ; - %load/vec4 v0x7fe52f716950_0; - %cmpi/e 0, 0, 1; - %jmp/1 T_2.4, 4; - %flag_mov 8, 4; - %load/vec4 v0x7fe52f716710_0; - %cmpi/e 15, 0, 8; - %flag_or 4, 8; -T_2.4; - %jmp/0xz T_2.2, 4; - %pushi/vec4 0, 0, 8; - %assign/vec4 v0x7fe52f716710_0, 0; - %jmp T_2.3; -T_2.2 ; - %load/vec4 v0x7fe52f716710_0; - %addi 1, 0, 8; - %assign/vec4 v0x7fe52f716710_0, 0; -T_2.3 ; + %pushi/vec4 1, 0, 1; + %assign/vec4 v000001463bb9e8c0_0, 0; T_2.1 ; %jmp T_2; .thread T_2; - .scope S_0x7fe52f706430; + .scope S_000001463bb446c0; T_3 ; - %wait E_0x7fe52f706320; - %load/vec4 v0x7fe52f716b30_0; + %wait E_000001463bb5a060; + %load/vec4 v000001463bb9eaa0_0; %nor/r; %flag_set/vec4 8; %jmp/0xz T_3.0, 8; - %pushi/vec4 0, 0, 3; - %assign/vec4 v0x7fe52f716860_0, 0; + %pushi/vec4 0, 0, 8; + %assign/vec4 v000001463bb098b0_0, 0; %jmp T_3.1; T_3.0 ; - %load/vec4 v0x7fe52f7169f0_0; - %flag_set/vec4 9; - %flag_get/vec4 9; - %jmp/0 T_3.4, 9; - %load/vec4 v0x7fe52f716860_0; - %cmpi/u 7, 0, 3; - %flag_get/vec4 5; - %and; + %load/vec4 v000001463bb9e8c0_0; + %cmpi/e 0, 0, 1; + %jmp/1 T_3.4, 4; + %flag_mov 8, 4; + %load/vec4 v000001463bb098b0_0; + %cmpi/e 15, 0, 8; + %flag_or 4, 8; T_3.4; - %flag_set/vec4 8; - %jmp/0xz T_3.2, 8; - %load/vec4 v0x7fe52f716860_0; - %addi 1, 0, 3; - %assign/vec4 v0x7fe52f716860_0, 0; + %jmp/0xz T_3.2, 4; + %pushi/vec4 0, 0, 8; + %assign/vec4 v000001463bb098b0_0, 0; %jmp T_3.3; T_3.2 ; - %pushi/vec4 0, 0, 3; - %assign/vec4 v0x7fe52f716860_0, 0; + %load/vec4 v000001463bb098b0_0; + %addi 1, 0, 8; + %assign/vec4 v000001463bb098b0_0, 0; T_3.3 ; T_3.1 ; %jmp T_3; .thread T_3; - .scope S_0x7fe52f706430; + .scope S_000001463bb446c0; T_4 ; - %wait E_0x7fe52f706320; - %load/vec4 v0x7fe52f716b30_0; + %wait E_000001463bb5a060; + %load/vec4 v000001463bb9eaa0_0; %nor/r; %flag_set/vec4 8; %jmp/0xz T_4.0, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x7fe52f7167b0_0, 0; + %assign/vec4 v000001463bb9e820_0, 0; %jmp T_4.1; T_4.0 ; - %load/vec4 v0x7fe52f716950_0; - %cmpi/e 0, 0, 1; - %flag_get/vec4 4; - %jmp/0 T_4.4, 4; - %load/vec4 v0x7fe52f7167b0_0; - %pushi/vec4 7, 0, 3; - %cmp/e; - %flag_get/vec4 4; + %load/vec4 v000001463bb9e960_0; + %flag_set/vec4 9; + %flag_get/vec4 9; + %jmp/0 T_4.4, 9; + %load/vec4 v000001463bb9e820_0; + %cmpi/u 7, 0, 3; + %flag_get/vec4 5; %and; T_4.4; %flag_set/vec4 8; %jmp/0xz T_4.2, 8; - %pushi/vec4 0, 0, 3; - %assign/vec4 v0x7fe52f7167b0_0, 0; + %load/vec4 v000001463bb9e820_0; + %addi 1, 0, 3; + %assign/vec4 v000001463bb9e820_0, 0; %jmp T_4.3; T_4.2 ; - %load/vec4 v0x7fe52f7167b0_0; - %addi 1, 0, 3; - %assign/vec4 v0x7fe52f7167b0_0, 0; + %pushi/vec4 0, 0, 3; + %assign/vec4 v000001463bb9e820_0, 0; T_4.3 ; T_4.1 ; %jmp T_4; .thread T_4; + .scope S_000001463bb446c0; +T_5 ; + %wait E_000001463bb5a060; + %load/vec4 v000001463bb9eaa0_0; + %nor/r; + %flag_set/vec4 8; + %jmp/0xz T_5.0, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v000001463bb09950_0, 0; + %jmp T_5.1; +T_5.0 ; + %load/vec4 v000001463bb9e8c0_0; + %flag_set/vec4 9; + %flag_get/vec4 9; + %jmp/0 T_5.4, 9; + %load/vec4 v000001463bb09950_0; + %cmpi/u 7, 0, 3; + %flag_get/vec4 5; + %and; +T_5.4; + %flag_set/vec4 8; + %jmp/0xz T_5.2, 8; + %load/vec4 v000001463bb09950_0; + %addi 1, 0, 3; + %assign/vec4 v000001463bb09950_0, 0; + %jmp T_5.3; +T_5.2 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v000001463bb09950_0, 0; +T_5.3 ; +T_5.1 ; + %jmp T_5; + .thread T_5; # The file index is used to find the file name in the following table. :file_names 3; "N/A";