From 78c14ea1a43dfb9b61819fb9cea70366a53f7f0e Mon Sep 17 00:00:00 2001
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Date: Thu, 16 May 2024 20:49:00 +0800
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---
 led_matrix/bln_test.v | 128 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 128 insertions(+)
 create mode 100644 led_matrix/bln_test.v

diff --git a/led_matrix/bln_test.v b/led_matrix/bln_test.v
new file mode 100644
index 0000000..7567c43
--- /dev/null
+++ b/led_matrix/bln_test.v
@@ -0,0 +1,128 @@
+// 呼吸灯实验
+module test_bln(
+    input wire sys_clk,  // U18
+    input wire sys_rst,  //J15
+    output wire o1, o2, o3, o4, o5, o6, o7, o8, o16,o15,o14,o13,o12,o11,o10,o9
+);
+
+
+
+
+
+parameter ns_max = 10'b110_0100;      // 100次
+parameter us_max = 10'b11_1110_1000;  // 1000次
+parameter ms_max = 10'b11_1110_1000;  // 1000次
+
+reg [9:0] ns_cnt;
+always @(posedge sys_clk or negedge sys_rst) begin
+    if (sys_rst == 1'b0) begin
+        ns_cnt <= 10'b0;
+    end
+    // 到了2us整 (每个时钟周期20ns, 当前已经100个20ns了 清零吧)
+    else if (ns_cnt == ns_max - 10'b1) begin  
+        ns_cnt <= 10'b0;
+    end
+    else begin
+        ns_cnt <= ns_cnt + 10'b1;
+    end
+end
+
+
+reg [9:0] us_cnt;
+always @(posedge sys_clk or negedge sys_rst) begin
+    if (sys_rst == 1'b0) begin
+        us_cnt <= 10'b0;
+    end
+    // 到了2ms整
+    else if ((us_cnt == us_max - 10'b1) && (ns_cnt == ns_max - 10'b1)) begin
+        us_cnt <= 10'b0;
+    end
+    // 到了2us整
+    else if (ns_cnt == ns_max - 10'b1) begin
+        us_cnt <= us_cnt + 10'b1;
+    end
+    else begin
+        us_cnt <= us_cnt;
+    end
+end
+
+
+reg [9:0] ms_cnt;
+always @(posedge sys_clk or negedge sys_rst) begin
+    if (sys_rst == 1'b0) begin
+        ms_cnt <= 10'b0;
+    end
+    // 到了2s整 清零
+    else if ((ms_cnt == ms_max - 10'b1) && (us_cnt == us_max - 10'b1) && (ns_cnt == ns_max - 10'b1)) begin
+        ms_cnt <= 10'b0;
+    end
+    // 到了2ms整
+    else if ((us_cnt == us_max - 10'b1) && (ns_cnt == ns_max - 10'b1)) begin
+        ms_cnt <= ms_cnt + 10'b1;
+    end
+    else begin
+        ms_cnt <= ms_cnt;
+    end
+end
+
+
+reg flag;  // 2s切换一下状态
+always @(posedge sys_clk or negedge sys_rst) begin
+    if (sys_rst == 1'b0) begin
+        flag <= 1'b0;
+    end
+    else if ((ms_cnt == ms_max - 10'b1) && (us_cnt == us_max - 10'b1) && (ns_cnt == ns_max - 10'b1)) begin
+        flag <= !flag;
+    end
+    else begin
+        flag <= flag;
+    end
+end
+
+reg [7:0]x;
+reg [7:0]y;
+always @(posedge sys_clk or negedge sys_rst) begin
+    if (sys_rst == 1'b0) begin
+        x <= 8'b0000_0000;
+        y <= 8'b1111_1111;
+    end
+    else begin
+    end
+    case({flag, us_cnt <= ms_cnt})
+        2'b01: x <= 8'b0000_0001;
+        2'b00: x <= 8'b0000_0000;
+        2'b11: x <= 8'b0000_0000;
+        2'b10: x <= 8'b0000_0001;
+        default ;
+    endcase
+end
+
+
+
+lm u_lm(
+    .x (x),
+    .y (y),
+    .o1 (o1),
+    .o2 (o2),
+    .o3 (o3),
+    .o4 (o4),
+    .o5 (o5),
+    .o6 (o6),
+    .o7 (o7),
+    .o8 (o8),
+    .o9 (o9),
+    .o10 (o10),
+    .o11 (o11),
+    .o12 (o12),
+    .o13 (o13),
+    .o14 (o14),
+    .o15 (o15),
+    .o16 (o16)
+);
+
+endmodule
+
+
+
+
+