diff --git a/led_matrix/lm.v b/led_matrix/lm.v index 8ac5a74..56984ff 100644 --- a/led_matrix/lm.v +++ b/led_matrix/lm.v @@ -1,14 +1,14 @@ module lm( - // input wire [7:0] x, - // input wire [7:0] y, + input wire [7:0] x, + input wire [7:0] y, // f20 f19 b20 c20 j16 k16 m18 m17 l17 l16 l15 l14 m15 m14 n16 n15 // x4 x2 x1 x3 x6 x7 x5 x8 // y2 y3 y5 y8 y7 y1 y6 y4 output wire o1, o2, o3, o4, o5, o6, o7, o8, o16,o15,o14,o13,o12,o11,o10,o9 ); -wire [7:0] x = 8'b1111_1111; -wire [7:0] y = 8'b1111_1111; +// wire [7:0] x = 8'b1111_1111; +// wire [7:0] y = 8'b1111_1111; assign {o9, o14, o8, o12, o1, o7, o2, o5} = x; assign {o16, o15, o11, o6, o10, o4, o3, o13} = ~y; diff --git a/led_matrix/lm.v.out b/led_matrix/lm.v.out index 7dfd820..c7e7ae6 100644 --- a/led_matrix/lm.v.out +++ b/led_matrix/lm.v.out @@ -7,64 +7,66 @@ :vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; :vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; :vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; -S_000001fdc02869e0 .scope module, "lm" "lm" 2 1; +S_00000256bb3769e0 .scope module, "lm" "lm" 2 1; .timescale 0 0; - .port_info 0 /OUTPUT 1 "o1"; - .port_info 1 /OUTPUT 1 "o2"; - .port_info 2 /OUTPUT 1 "o3"; - .port_info 3 /OUTPUT 1 "o4"; - .port_info 4 /OUTPUT 1 "o5"; - .port_info 5 /OUTPUT 1 "o6"; - .port_info 6 /OUTPUT 1 "o7"; - .port_info 7 /OUTPUT 1 "o8"; - .port_info 8 /OUTPUT 1 "o16"; - .port_info 9 /OUTPUT 1 "o15"; - .port_info 10 /OUTPUT 1 "o14"; - .port_info 11 /OUTPUT 1 "o13"; - .port_info 12 /OUTPUT 1 "o12"; - .port_info 13 /OUTPUT 1 "o11"; - .port_info 14 /OUTPUT 1 "o10"; - .port_info 15 /OUTPUT 1 "o9"; -L_000001fdc0193c68 .functor BUFT 1, C4<11111111>, C4<0>, C4<0>, C4<0>; -L_000001fdc0286f10 .functor BUFZ 8, L_000001fdc0193c68, C4<00000000>, C4<00000000>, C4<00000000>; -L_000001fdc0193cb0 .functor BUFT 1, C4<11111111>, C4<0>, C4<0>, C4<0>; -L_000001fdc0144340 .functor BUFZ 8, L_000001fdc0193cb0, C4<00000000>, C4<00000000>, C4<00000000>; -v000001fdc0136480_0 .net *"_ivl_14", 7 0, L_000001fdc0286f10; 1 drivers -v000001fdc0135a80_0 .net *"_ivl_25", 7 0, L_000001fdc0144340; 1 drivers -v000001fdc01365c0_0 .net "o1", 0 0, L_000001fdc01dc760; 1 drivers -v000001fdc0136200_0 .net "o10", 0 0, L_000001fdc01dd520; 1 drivers -v000001fdc0136660_0 .net "o11", 0 0, L_000001fdc01dce40; 1 drivers -v000001fdc01359e0_0 .net "o12", 0 0, L_000001fdc0136020; 1 drivers -v000001fdc01362a0_0 .net "o13", 0 0, L_000001fdc01ddb60; 1 drivers -v000001fdc01368e0_0 .net "o14", 0 0, L_000001fdc0135ee0; 1 drivers -v000001fdc0135d00_0 .net "o15", 0 0, L_000001fdc01dd160; 1 drivers -v000001fdc0135b20_0 .net "o16", 0 0, L_000001fdc01dc800; 1 drivers -v000001fdc0135da0_0 .net "o2", 0 0, L_000001fdc01dbf40; 1 drivers -v000001fdc0136520_0 .net "o3", 0 0, L_000001fdc01dc080; 1 drivers -v000001fdc0136340_0 .net "o4", 0 0, L_000001fdc01dbfe0; 1 drivers -v000001fdc01360c0_0 .net "o5", 0 0, L_000001fdc01dbcc0; 1 drivers -v000001fdc01367a0_0 .net "o6", 0 0, L_000001fdc01dcf80; 1 drivers -v000001fdc0135e40_0 .net "o7", 0 0, L_000001fdc01dbea0; 1 drivers -v000001fdc0135bc0_0 .net "o8", 0 0, L_000001fdc0135c60; 1 drivers -v000001fdc0136840_0 .net "o9", 0 0, L_000001fdc0136700; 1 drivers -v000001fdc01363e0_0 .net "x", 7 0, L_000001fdc0193c68; 1 drivers -v000001fdc0135f80_0 .net "y", 7 0, L_000001fdc0193cb0; 1 drivers -L_000001fdc0136700 .part L_000001fdc0286f10, 7, 1; -L_000001fdc0135ee0 .part L_000001fdc0286f10, 6, 1; -L_000001fdc0135c60 .part L_000001fdc0286f10, 5, 1; -L_000001fdc0136020 .part L_000001fdc0286f10, 4, 1; -L_000001fdc01dc760 .part L_000001fdc0286f10, 3, 1; -L_000001fdc01dbea0 .part L_000001fdc0286f10, 2, 1; -L_000001fdc01dbf40 .part L_000001fdc0286f10, 1, 1; -L_000001fdc01dbcc0 .part L_000001fdc0286f10, 0, 1; -L_000001fdc01dc800 .part L_000001fdc0144340, 7, 1; -L_000001fdc01dd160 .part L_000001fdc0144340, 6, 1; -L_000001fdc01dce40 .part L_000001fdc0144340, 5, 1; -L_000001fdc01dcf80 .part L_000001fdc0144340, 4, 1; -L_000001fdc01dd520 .part L_000001fdc0144340, 3, 1; -L_000001fdc01dbfe0 .part L_000001fdc0144340, 2, 1; -L_000001fdc01dc080 .part L_000001fdc0144340, 1, 1; -L_000001fdc01ddb60 .part L_000001fdc0144340, 0, 1; + .port_info 0 /INPUT 8 "x"; + .port_info 1 /INPUT 8 "y"; + .port_info 2 /OUTPUT 1 "o1"; + .port_info 3 /OUTPUT 1 "o2"; + .port_info 4 /OUTPUT 1 "o3"; + .port_info 5 /OUTPUT 1 "o4"; + .port_info 6 /OUTPUT 1 "o5"; + .port_info 7 /OUTPUT 1 "o6"; + .port_info 8 /OUTPUT 1 "o7"; + .port_info 9 /OUTPUT 1 "o8"; + .port_info 10 /OUTPUT 1 "o16"; + .port_info 11 /OUTPUT 1 "o15"; + .port_info 12 /OUTPUT 1 "o14"; + .port_info 13 /OUTPUT 1 "o13"; + .port_info 14 /OUTPUT 1 "o12"; + .port_info 15 /OUTPUT 1 "o11"; + .port_info 16 /OUTPUT 1 "o10"; + .port_info 17 /OUTPUT 1 "o9"; +o00000256bb3c72f8 .functor BUFZ 8, C4; HiZ drive +L_00000256bb3c47f0 .functor BUFZ 8, o00000256bb3c72f8, C4<00000000>, C4<00000000>, C4<00000000>; +o00000256bb3c7328 .functor BUFZ 8, C4; HiZ drive +L_00000256bb376ca0 .functor NOT 8, o00000256bb3c7328, C4<00000000>, C4<00000000>, C4<00000000>; +v00000256bb3b47a0_0 .net *"_ivl_10", 7 0, L_00000256bb3c47f0; 1 drivers +v00000256bb3b5100_0 .net *"_ivl_20", 7 0, L_00000256bb376ca0; 1 drivers +v00000256bb3b4340_0 .net "o1", 0 0, L_00000256bb412e40; 1 drivers +v00000256bb3b43e0_0 .net "o10", 0 0, L_00000256bb413a20; 1 drivers +v00000256bb3b4980_0 .net "o11", 0 0, L_00000256bb413660; 1 drivers +v00000256bb3b4480_0 .net "o12", 0 0, L_00000256bb412a80; 1 drivers +v00000256bb3b4a20_0 .net "o13", 0 0, L_00000256bb413020; 1 drivers +v00000256bb3b4ac0_0 .net "o14", 0 0, L_00000256bb4124e0; 1 drivers +v00000256bb412b20_0 .net "o15", 0 0, L_00000256bb4130c0; 1 drivers +v00000256bb412da0_0 .net "o16", 0 0, L_00000256bb412c60; 1 drivers +v00000256bb412580_0 .net "o2", 0 0, L_00000256bb413340; 1 drivers +v00000256bb412940_0 .net "o3", 0 0, L_00000256bb412d00; 1 drivers +v00000256bb412ee0_0 .net "o4", 0 0, L_00000256bb413840; 1 drivers +v00000256bb413ac0_0 .net "o5", 0 0, L_00000256bb4126c0; 1 drivers +v00000256bb413200_0 .net "o6", 0 0, L_00000256bb4135c0; 1 drivers +v00000256bb4129e0_0 .net "o7", 0 0, L_00000256bb412620; 1 drivers +v00000256bb412760_0 .net "o8", 0 0, L_00000256bb413520; 1 drivers +v00000256bb412bc0_0 .net "o9", 0 0, L_00000256bb413980; 1 drivers +v00000256bb412f80_0 .net "x", 7 0, o00000256bb3c72f8; 0 drivers +v00000256bb412300_0 .net "y", 7 0, o00000256bb3c7328; 0 drivers +L_00000256bb413980 .part L_00000256bb3c47f0, 7, 1; +L_00000256bb4124e0 .part L_00000256bb3c47f0, 6, 1; +L_00000256bb413520 .part L_00000256bb3c47f0, 5, 1; +L_00000256bb412a80 .part L_00000256bb3c47f0, 4, 1; +L_00000256bb412e40 .part L_00000256bb3c47f0, 3, 1; +L_00000256bb412620 .part L_00000256bb3c47f0, 2, 1; +L_00000256bb413340 .part L_00000256bb3c47f0, 1, 1; +L_00000256bb4126c0 .part L_00000256bb3c47f0, 0, 1; +L_00000256bb412c60 .part L_00000256bb376ca0, 7, 1; +L_00000256bb4130c0 .part L_00000256bb376ca0, 6, 1; +L_00000256bb413660 .part L_00000256bb376ca0, 5, 1; +L_00000256bb4135c0 .part L_00000256bb376ca0, 4, 1; +L_00000256bb413a20 .part L_00000256bb376ca0, 3, 1; +L_00000256bb413840 .part L_00000256bb376ca0, 2, 1; +L_00000256bb412d00 .part L_00000256bb376ca0, 1, 1; +L_00000256bb413020 .part L_00000256bb376ca0, 0, 1; # The file index is used to find the file name in the following table. :file_names 3; "N/A"; diff --git a/led_matrix/lm.xdc b/led_matrix/lm.xdc new file mode 100644 index 0000000..9c0d36f --- /dev/null +++ b/led_matrix/lm.xdc @@ -0,0 +1,32 @@ +set_property PACKAGE_PIN F20 [get_ports o1] +set_property PACKAGE_PIN F19 [get_ports o2] +set_property PACKAGE_PIN B20 [get_ports o3] +set_property PACKAGE_PIN C20 [get_ports o4] +set_property PACKAGE_PIN J16 [get_ports o5] +set_property PACKAGE_PIN K16 [get_ports o6] +set_property PACKAGE_PIN M18 [get_ports o7] +set_property PACKAGE_PIN M17 [get_ports o8] +set_property PACKAGE_PIN N15 [get_ports o9] +set_property PACKAGE_PIN N16 [get_ports o10] +set_property PACKAGE_PIN M14 [get_ports o11] +set_property PACKAGE_PIN M15 [get_ports o12] +set_property PACKAGE_PIN L14 [get_ports o13] +set_property PACKAGE_PIN L15 [get_ports o14] +set_property PACKAGE_PIN L16 [get_ports o15] +set_property PACKAGE_PIN L17 [get_ports o16] +set_property IOSTANDARD LVCMOS33 [get_ports o1] +set_property IOSTANDARD LVCMOS33 [get_ports o2] +set_property IOSTANDARD LVCMOS33 [get_ports o3] +set_property IOSTANDARD LVCMOS33 [get_ports o4] +set_property IOSTANDARD LVCMOS33 [get_ports o5] +set_property IOSTANDARD LVCMOS33 [get_ports o6] +set_property IOSTANDARD LVCMOS33 [get_ports o7] +set_property IOSTANDARD LVCMOS33 [get_ports o8] +set_property IOSTANDARD LVCMOS33 [get_ports o9] +set_property IOSTANDARD LVCMOS33 [get_ports o10] +set_property IOSTANDARD LVCMOS33 [get_ports o11] +set_property IOSTANDARD LVCMOS33 [get_ports o13] +set_property IOSTANDARD LVCMOS33 [get_ports o12] +set_property IOSTANDARD LVCMOS33 [get_ports o14] +set_property IOSTANDARD LVCMOS33 [get_ports o15] +set_property IOSTANDARD LVCMOS33 [get_ports o16] diff --git a/led_matrix/test.v b/led_matrix/test.v new file mode 100644 index 0000000..e555796 --- /dev/null +++ b/led_matrix/test.v @@ -0,0 +1,87 @@ +module test_lm( + input wire sys_clk, // U18 + input wire sys_rst, //J15 + output wire o1, o2, o3, o4, o5, o6, o7, o8, o16,o15,o14,o13,o12,o11,o10,o9 +); + +reg [2:0]Y_IDX = 3'b000; // 逐行显示, 当前第几行了, 一共8行 + + +reg [25:0] CNT; + +always @(posedge sys_clk or negedge sys_rst) begin + if (sys_rst == 1'b0) begin + CNT <= 25'd0; + end + else if (CNT < (25'd25000000 - 25'd1)) begin + CNT <= CNT + 25'd1; + end + else begin + CNT <= 25'b0; + end +end + +parameter show_data = 64'b10000000_01000000_00100000_00010000_00001000_00000100_00000010_00000001; + + +reg [7:0]x = 8'b1010_1100; + +always @(posedge sys_clk or negedge sys_rst) begin + if (sys_rst == 1'b0) begin + x <= 8'b0000_0000; //不通电了 + end + else if (CNT == (25'd25000000 - 25'd1)) begin + // 推进状态, 选择一行x + // x <= 8'b1010_1100; + x <= show_data[(Y_IDX * 8)+:8]; + end + else begin + end +end + + + + +reg [7:0]y = 8'b1111_1111; +always @(posedge sys_clk or negedge sys_rst) begin + if (sys_rst == 1'b0) begin + y <= 8'b1111_1111; // x已经变成0了, 这里防止二极管接反, 就继续片选即可 内部低电平 + Y_IDX <= 3'b000; + end + else if (CNT == (25'd25000000 - 25'd1)) begin + // 推进状态 + case (&y) + 1'b1: y <= 8'b0000_0001; + default y <= {y[6:0], y[7]}; + endcase + Y_IDX <= Y_IDX + 3'b1; + end + else begin + end +end + + + +lm u_lm( + .x (x), + .y (y), + .o1 (o1), + .o2 (o2), + .o3 (o3), + .o4 (o4), + .o5 (o5), + .o6 (o6), + .o7 (o7), + .o8 (o8), + .o9 (o9), + .o10 (o10), + .o11 (o11), + .o12 (o12), + .o13 (o13), + .o14 (o14), + .o15 (o15), + .o16 (o16) +); + + +endmodule \ No newline at end of file diff --git a/led_matrix/test.v.out b/led_matrix/test.v.out new file mode 100644 index 0000000..19c4588 --- /dev/null +++ b/led_matrix/test.v.out @@ -0,0 +1,175 @@ +#! /c/Source/iverilog-install/bin/vvp +:ivl_version "12.0 (devel)" "(s20150603-1539-g2693dd32b)"; +:ivl_delay_selection "TYPICAL"; +:vpi_time_precision + 0; +:vpi_module "C:\iverilog\lib\ivl\system.vpi"; +:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; +:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; +:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; +:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; +S_0000021a91b568d0 .scope module, "test_lm" "test_lm" 2 1; + .timescale 0 0; + .port_info 0 /INPUT 1 "sys_clk"; + .port_info 1 /INPUT 1 "sys_rst"; + .port_info 2 /OUTPUT 1 "o1"; + .port_info 3 /OUTPUT 1 "o2"; + .port_info 4 /OUTPUT 1 "o3"; + .port_info 5 /OUTPUT 1 "o4"; + .port_info 6 /OUTPUT 1 "o5"; + .port_info 7 /OUTPUT 1 "o6"; + .port_info 8 /OUTPUT 1 "o7"; + .port_info 9 /OUTPUT 1 "o8"; + .port_info 10 /OUTPUT 1 "o16"; + .port_info 11 /OUTPUT 1 "o15"; + .port_info 12 /OUTPUT 1 "o14"; + .port_info 13 /OUTPUT 1 "o13"; + .port_info 14 /OUTPUT 1 "o12"; + .port_info 15 /OUTPUT 1 "o11"; + .port_info 16 /OUTPUT 1 "o10"; + .port_info 17 /OUTPUT 1 "o9"; +P_0000021a91b5b250 .param/l "show_data" 0 2 24, C4<1000000001000000001000000001000000001000000001000000001000000001>; +v0000021a91b5d800_0 .var "CNT", 25 0; +v0000021a91b5bf20_0 .var "Y_IDX", 2 0; +o0000021a919fdf68 .functor BUFZ 1, C4; HiZ drive +v0000021a91b56b90_0 .net "o1", 0 0, o0000021a919fdf68; 0 drivers +o0000021a919fdf98 .functor BUFZ 1, C4; HiZ drive +v0000021a91b56c30_0 .net "o10", 0 0, o0000021a919fdf98; 0 drivers +o0000021a919fdfc8 .functor BUFZ 1, C4; HiZ drive +v0000021a91a42f90_0 .net "o11", 0 0, o0000021a919fdfc8; 0 drivers +o0000021a919fdff8 .functor BUFZ 1, C4; HiZ drive +v0000021a91a43030_0 .net "o12", 0 0, o0000021a919fdff8; 0 drivers +o0000021a919fe028 .functor BUFZ 1, C4; HiZ drive +v0000021a91a430d0_0 .net "o13", 0 0, o0000021a919fe028; 0 drivers +o0000021a919fe058 .functor BUFZ 1, C4; HiZ drive +v0000021a91a43170_0 .net "o14", 0 0, o0000021a919fe058; 0 drivers +o0000021a919fe088 .functor BUFZ 1, C4; HiZ drive +v0000021a91a43210_0 .net "o15", 0 0, o0000021a919fe088; 0 drivers +o0000021a919fe0b8 .functor BUFZ 1, C4; HiZ drive +v0000021a91a432b0_0 .net "o16", 0 0, o0000021a919fe0b8; 0 drivers +o0000021a919fe0e8 .functor BUFZ 1, C4; HiZ drive +v0000021a91a43350_0 .net "o2", 0 0, o0000021a919fe0e8; 0 drivers +o0000021a919fe118 .functor BUFZ 1, C4; HiZ drive +v0000021a91a433f0_0 .net "o3", 0 0, o0000021a919fe118; 0 drivers +o0000021a919fe148 .functor BUFZ 1, C4; HiZ drive +v0000021a91a43490_0 .net "o4", 0 0, o0000021a919fe148; 0 drivers +o0000021a919fe178 .functor BUFZ 1, C4; HiZ drive +v0000021a91a43530_0 .net "o5", 0 0, o0000021a919fe178; 0 drivers +o0000021a919fe1a8 .functor BUFZ 1, C4; HiZ drive +v0000021a919f3b00_0 .net "o6", 0 0, o0000021a919fe1a8; 0 drivers +o0000021a919fe1d8 .functor BUFZ 1, C4; HiZ drive +v0000021a919f4000_0 .net "o7", 0 0, o0000021a919fe1d8; 0 drivers +o0000021a919fe208 .functor BUFZ 1, C4; HiZ drive +v0000021a919f3c40_0 .net "o8", 0 0, o0000021a919fe208; 0 drivers +o0000021a919fe238 .functor BUFZ 1, C4; HiZ drive +v0000021a919f3ba0_0 .net "o9", 0 0, o0000021a919fe238; 0 drivers +o0000021a919fe268 .functor BUFZ 1, C4; HiZ drive +v0000021a919f3ec0_0 .net "sys_clk", 0 0, o0000021a919fe268; 0 drivers +o0000021a919fe298 .functor BUFZ 1, C4; HiZ drive +v0000021a919f3880_0 .net "sys_rst", 0 0, o0000021a919fe298; 0 drivers +v0000021a919f3920_0 .var "x", 7 0; +v0000021a919f40a0_0 .var "y", 7 0; +E_0000021a91b5ad90/0 .event negedge, v0000021a919f3880_0; +E_0000021a91b5ad90/1 .event posedge, v0000021a919f3ec0_0; +E_0000021a91b5ad90 .event/or E_0000021a91b5ad90/0, E_0000021a91b5ad90/1; + .scope S_0000021a91b568d0; +T_0 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0000021a91b5bf20_0, 0, 3; + %pushi/vec4 255, 0, 8; + %store/vec4 v0000021a919f3920_0, 0, 8; + %pushi/vec4 255, 0, 8; + %store/vec4 v0000021a919f40a0_0, 0, 8; + %end; + .thread T_0; + .scope S_0000021a91b568d0; +T_1 ; + %wait E_0000021a91b5ad90; + %load/vec4 v0000021a919f3880_0; + %cmpi/e 0, 0, 1; + %jmp/0xz T_1.0, 4; + %pushi/vec4 0, 0, 26; + %assign/vec4 v0000021a91b5d800_0, 0; + %jmp T_1.1; +T_1.0 ; + %load/vec4 v0000021a91b5d800_0; + %cmpi/u 24999, 0, 26; + %jmp/0xz T_1.2, 5; + %load/vec4 v0000021a91b5d800_0; + %addi 1, 0, 26; + %assign/vec4 v0000021a91b5d800_0, 0; + %jmp T_1.3; +T_1.2 ; + %pushi/vec4 0, 0, 26; + %assign/vec4 v0000021a91b5d800_0, 0; +T_1.3 ; +T_1.1 ; + %jmp T_1; + .thread T_1; + .scope S_0000021a91b568d0; +T_2 ; + %wait E_0000021a91b5ad90; + %load/vec4 v0000021a919f3880_0; + %cmpi/e 0, 0, 1; + %jmp/0xz T_2.0, 4; + %pushi/vec4 0, 0, 8; + %assign/vec4 v0000021a919f3920_0, 0; + %jmp T_2.1; +T_2.0 ; + %load/vec4 v0000021a91b5d800_0; + %cmpi/e 24999, 0, 26; + %jmp/0xz T_2.2, 4; + %pushi/vec4 2151686160, 0, 32; + %concati/vec4 134480385, 0, 32; + %load/vec4 v0000021a91b5bf20_0; + %pad/u 32; + %muli 8, 0, 32; + %part/u 8; + %assign/vec4 v0000021a919f3920_0, 0; +T_2.2 ; +T_2.1 ; + %jmp T_2; + .thread T_2; + .scope S_0000021a91b568d0; +T_3 ; + %wait E_0000021a91b5ad90; + %load/vec4 v0000021a919f3880_0; + %cmpi/e 0, 0, 1; + %jmp/0xz T_3.0, 4; + %pushi/vec4 255, 0, 8; + %assign/vec4 v0000021a919f40a0_0, 0; + %jmp T_3.1; +T_3.0 ; + %load/vec4 v0000021a91b5d800_0; + %cmpi/e 24999, 0, 26; + %jmp/0xz T_3.2, 4; + %load/vec4 v0000021a919f40a0_0; + %or/r; + %dup/vec4; + %pushi/vec4 1, 0, 1; + %cmp/u; + %jmp/1 T_3.4, 6; + %pushi/vec4 1, 0, 8; + %assign/vec4 v0000021a919f40a0_0, 0; + %jmp T_3.6; +T_3.4 ; + %load/vec4 v0000021a919f40a0_0; + %parti/s 7, 0, 2; + %load/vec4 v0000021a919f40a0_0; + %parti/s 1, 7, 4; + %concat/vec4; draw_concat_vec4 + %assign/vec4 v0000021a919f40a0_0, 0; + %jmp T_3.6; +T_3.6 ; + %pop/vec4 1; + %load/vec4 v0000021a91b5bf20_0; + %addi 1, 0, 3; + %assign/vec4 v0000021a91b5bf20_0, 0; +T_3.2 ; +T_3.1 ; + %jmp T_3; + .thread T_3; +# The file index is used to find the file name in the following table. +:file_names 3; + "N/A"; + ""; + "test.v"; diff --git a/led_matrix/test_lm.xdc b/led_matrix/test_lm.xdc new file mode 100644 index 0000000..a54479b --- /dev/null +++ b/led_matrix/test_lm.xdc @@ -0,0 +1,37 @@ +create_clock -period 20.000 -name sys_clk [get_posts sys_clk] +set_property PACKAGE_PIN F20 [get_ports o1] +set_property PACKAGE_PIN F19 [get_ports o2] +set_property PACKAGE_PIN B20 [get_ports o3] +set_property PACKAGE_PIN C20 [get_ports o4] +set_property PACKAGE_PIN J16 [get_ports o5] +set_property PACKAGE_PIN K16 [get_ports o6] +set_property PACKAGE_PIN M18 [get_ports o7] +set_property PACKAGE_PIN M17 [get_ports o8] +set_property PACKAGE_PIN N15 [get_ports o9] +set_property PACKAGE_PIN N16 [get_ports o10] +set_property PACKAGE_PIN M14 [get_ports o11] +set_property PACKAGE_PIN M15 [get_ports o12] +set_property PACKAGE_PIN L14 [get_ports o13] +set_property PACKAGE_PIN L15 [get_ports o14] +set_property PACKAGE_PIN L16 [get_ports o15] +set_property PACKAGE_PIN L17 [get_ports o16] +set_property PACKAGE_PIN U18 [get_ports sys_clk] +set_property PACKAGE_PIN J15 [get_ports sys_rst] +set_property IOSTANDARD LVCMOS33 [get_ports o1] +set_property IOSTANDARD LVCMOS33 [get_ports o2] +set_property IOSTANDARD LVCMOS33 [get_ports o3] +set_property IOSTANDARD LVCMOS33 [get_ports o4] +set_property IOSTANDARD LVCMOS33 [get_ports o5] +set_property IOSTANDARD LVCMOS33 [get_ports o6] +set_property IOSTANDARD LVCMOS33 [get_ports o7] +set_property IOSTANDARD LVCMOS33 [get_ports o8] +set_property IOSTANDARD LVCMOS33 [get_ports o9] +set_property IOSTANDARD LVCMOS33 [get_ports o10] +set_property IOSTANDARD LVCMOS33 [get_ports o11] +set_property IOSTANDARD LVCMOS33 [get_ports o13] +set_property IOSTANDARD LVCMOS33 [get_ports o12] +set_property IOSTANDARD LVCMOS33 [get_ports o14] +set_property IOSTANDARD LVCMOS33 [get_ports o15] +set_property IOSTANDARD LVCMOS33 [get_ports o16] +set_property IOSTANDARD LVCMOS33 [get_ports sys_rst] +set_property IOSTANDARD LVCMOS33 [get_ports sys_clk] \ No newline at end of file