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补充说明一些基础语法

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阳光少年 8 months ago
parent a6465c3f55
commit 97f0eb7b83
4 changed files with 294 additions and 121 deletions
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66
digital_tube/dt.v
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@ -2,33 +2,45 @@
// 7 8 9 10 11 12 6 5 4 3 2 1
// B S3 S2 F A S1 S4 G C DP D E
module dt(
output wire A, B, C, D, E, F, G, DP,
output wire S1, S2, S3, S4
input wire [7:0]data, // en: 1, select:2, dp: 1, data: 4
output reg A, B, C, D, E, F, G, DP,
output reg S1, S2, S3, S4
);
parameter SELECT_1 = 4'b1110;
parameter SELECT_2 = 4'b1101;
parameter SELECT_3 = 4'b1011;
parameter SELECT_4 = 4'b0111;
// ABCD_EFGP
parameter SHOW_1 = 8'B0110_0000;
parameter SHOW_2 = 8'B1101_1010;
parameter SHOW_3 = 8'B1111_0010;
parameter SHOW_4 = 8'B0110_0110;
parameter SHOW_5 = 8'B1111_1110;
parameter SHOW_6 = 8'B1111_1110;
parameter SHOW_7 = 8'B1111_1110;
parameter SHOW_8 = 8'B1111_1110;
parameter SHOW_9 = 8'B1111_1110;
parameter SHOW_0 = 8'B1111_1110;
assign {S4, S3, S2, S1} = SELECT_1;
assign {A, B, C, D, E, F, G, DP} = SHOW_1;
parameter _SELECT_1 = 4'b1110;
parameter _SELECT_2 = 4'b1101;
parameter _SELECT_3 = 4'b1011;
parameter _SELECT_4 = 4'b0111;
parameter SELECTOR = {_SELECT_4, _SELECT_3, _SELECT_2, _SELECT_1};
// ABCD_EFGP
parameter _SHOW_1 = 8'B0110_0000;
parameter _SHOW_2 = 8'B1101_1010;
parameter _SHOW_3 = 8'B1111_0010;
parameter _SHOW_4 = 8'B0110_0110;
parameter _SHOW_5 = 8'B1111_1110;
parameter _SHOW_6 = 8'B1111_1110;
parameter _SHOW_7 = 8'B1111_1110;
parameter _SHOW_8 = 8'B1111_1110;
parameter _SHOW_9 = 8'B1111_1110;
parameter _SHOW_0 = 8'B1111_1110;
parameter _SHOW_A = 8'B1111_1110;
parameter _SHOW_B = 8'B1111_1110;
parameter _SHOW_C = 8'B1111_1110;
parameter _SHOW_D = 8'B1111_1110;
parameter _SHOW_E = 8'B1111_1110;
parameter _SHOW_F = 8'B1111_1110;
parameter SHOW = {_SHOW_F, _SHOW_E, _SHOW_D, _SHOW_C, _SHOW_B, _SHOW_A, _SHOW_9, _SHOW_8, _SHOW_7, _SHOW_6, _SHOW_5, _SHOW_4, _SHOW_3, _SHOW_2, _SHOW_1, _SHOW_0};
always @(data) begin
if (!data[7])
{S4, S3, S2, S1} = 4'b1111;
else
{S4, S3, S2, S1} = SELECTOR >> (data[6:5] << 2);
{A, B, C, D, E, F, G, DP} = {SHOW >> (data[3:0] << 3) >> 1, data[4]};
end
endmodule

148
digital_tube/dt.v.out
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@ -7,44 +7,120 @@
:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi";
:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi";
:vpi_module "C:\iverilog\lib\ivl\va_math.vpi";
S_000001a9677564a0 .scope module, "dt" "dt" 2 4;
S_00000211cef464a0 .scope module, "dt" "dt" 2 4;
.timescale 0 0;
.port_info 0 /OUTPUT 1 "B";
.port_info 1 /OUTPUT 1 "S3";
.port_info 2 /OUTPUT 1 "S2";
.port_info 3 /OUTPUT 1 "F";
.port_info 4 /OUTPUT 1 "A";
.port_info 5 /OUTPUT 1 "S1";
.port_info 6 /OUTPUT 1 "S4";
.port_info 0 /INPUT 8 "data";
.port_info 1 /OUTPUT 1 "A";
.port_info 2 /OUTPUT 1 "B";
.port_info 3 /OUTPUT 1 "C";
.port_info 4 /OUTPUT 1 "D";
.port_info 5 /OUTPUT 1 "E";
.port_info 6 /OUTPUT 1 "F";
.port_info 7 /OUTPUT 1 "G";
.port_info 8 /OUTPUT 1 "C";
.port_info 9 /OUTPUT 1 "DP";
.port_info 10 /OUTPUT 1 "D";
.port_info 11 /OUTPUT 1 "E";
o000001a9678e6fd8 .functor BUFZ 1, C4<z>; HiZ drive
v000001a9677569d0_0 .net "A", 0 0, o000001a9678e6fd8; 0 drivers
o000001a9678e7008 .functor BUFZ 1, C4<z>; HiZ drive
v000001a967756700_0 .net "B", 0 0, o000001a9678e7008; 0 drivers
o000001a9678e7038 .functor BUFZ 1, C4<z>; HiZ drive
v000001a96775d980_0 .net "C", 0 0, o000001a9678e7038; 0 drivers
o000001a9678e7068 .functor BUFZ 1, C4<z>; HiZ drive
v000001a96775da20_0 .net "D", 0 0, o000001a9678e7068; 0 drivers
o000001a9678e7098 .functor BUFZ 1, C4<z>; HiZ drive
v000001a96775dac0_0 .net "DP", 0 0, o000001a9678e7098; 0 drivers
o000001a9678e70c8 .functor BUFZ 1, C4<z>; HiZ drive
v000001a96775db60_0 .net "E", 0 0, o000001a9678e70c8; 0 drivers
o000001a9678e70f8 .functor BUFZ 1, C4<z>; HiZ drive
v000001a96775dc00_0 .net "F", 0 0, o000001a9678e70f8; 0 drivers
o000001a9678e7128 .functor BUFZ 1, C4<z>; HiZ drive
v000001a96775dca0_0 .net "G", 0 0, o000001a9678e7128; 0 drivers
o000001a9678e7158 .functor BUFZ 1, C4<z>; HiZ drive
v000001a96775dd40_0 .net "S1", 0 0, o000001a9678e7158; 0 drivers
o000001a9678e7188 .functor BUFZ 1, C4<z>; HiZ drive
v000001a96775de70_0 .net "S2", 0 0, o000001a9678e7188; 0 drivers
o000001a9678e71b8 .functor BUFZ 1, C4<z>; HiZ drive
v000001a96775df10_0 .net "S3", 0 0, o000001a9678e71b8; 0 drivers
o000001a9678e71e8 .functor BUFZ 1, C4<z>; HiZ drive
v000001a96775dfb0_0 .net "S4", 0 0, o000001a9678e71e8; 0 drivers
.port_info 8 /OUTPUT 1 "DP";
.port_info 9 /OUTPUT 1 "S1";
.port_info 10 /OUTPUT 1 "S2";
.port_info 11 /OUTPUT 1 "S3";
.port_info 12 /OUTPUT 1 "S4";
P_00000211cee05740 .param/l "SELECTOR" 0 2 15, C4<0111101111011110>;
P_00000211cee05778 .param/l "SHOW" 0 2 36, C4<11111110111111101111111011111110111111101111111011111110111111101111111011111110111111100110011011110010110110100110000011111110>;
P_00000211cee057b0 .param/l "_SELECT_1" 0 2 10, C4<1110>;
P_00000211cee057e8 .param/l "_SELECT_2" 0 2 11, C4<1101>;
P_00000211cee05820 .param/l "_SELECT_3" 0 2 12, C4<1011>;
P_00000211cee05858 .param/l "_SELECT_4" 0 2 13, C4<0111>;
P_00000211cee05890 .param/l "_SHOW_0" 0 2 28, C4<11111110>;
P_00000211cee058c8 .param/l "_SHOW_1" 0 2 19, C4<01100000>;
P_00000211cee05900 .param/l "_SHOW_2" 0 2 20, C4<11011010>;
P_00000211cee05938 .param/l "_SHOW_3" 0 2 21, C4<11110010>;
P_00000211cee05970 .param/l "_SHOW_4" 0 2 22, C4<01100110>;
P_00000211cee059a8 .param/l "_SHOW_5" 0 2 23, C4<11111110>;
P_00000211cee059e0 .param/l "_SHOW_6" 0 2 24, C4<11111110>;
P_00000211cee05a18 .param/l "_SHOW_7" 0 2 25, C4<11111110>;
P_00000211cee05a50 .param/l "_SHOW_8" 0 2 26, C4<11111110>;
P_00000211cee05a88 .param/l "_SHOW_9" 0 2 27, C4<11111110>;
P_00000211cee05ac0 .param/l "_SHOW_A" 0 2 29, C4<11111110>;
P_00000211cee05af8 .param/l "_SHOW_B" 0 2 30, C4<11111110>;
P_00000211cee05b30 .param/l "_SHOW_C" 0 2 31, C4<11111110>;
P_00000211cee05b68 .param/l "_SHOW_D" 0 2 32, C4<11111110>;
P_00000211cee05ba0 .param/l "_SHOW_E" 0 2 33, C4<11111110>;
P_00000211cee05bd8 .param/l "_SHOW_F" 0 2 34, C4<11111110>;
v00000211cef46b40_0 .var "A", 0 0;
v00000211cef46710_0 .var "B", 0 0;
v00000211cee144b0_0 .var "C", 0 0;
v00000211cee14550_0 .var "D", 0 0;
v00000211cee145f0_0 .var "DP", 0 0;
v00000211cee5d420_0 .var "E", 0 0;
v00000211cee5d4c0_0 .var "F", 0 0;
v00000211cee5d560_0 .var "G", 0 0;
v00000211cee5d600_0 .var "S1", 0 0;
v00000211cee5d730_0 .var "S2", 0 0;
v00000211cee5d7d0_0 .var "S3", 0 0;
v00000211cee5d870_0 .var "S4", 0 0;
o00000211cee1a1e8 .functor BUFZ 8, C4<zzzzzzzz>; HiZ drive
v00000211cee5d910_0 .net "data", 7 0, o00000211cee1a1e8; 0 drivers
E_00000211cee188d0 .event anyedge, v00000211cee5d910_0;
.scope S_00000211cef464a0;
T_0 ;
%wait E_00000211cee188d0;
%load/vec4 v00000211cee5d910_0;
%parti/s 1, 7, 4;
%nor/r;
%flag_set/vec4 8;
%jmp/0xz T_0.0, 8;
%pushi/vec4 15, 0, 4;
%split/vec4 1;
%assign/vec4 v00000211cee5d600_0, 0;
%split/vec4 1;
%assign/vec4 v00000211cee5d730_0, 0;
%split/vec4 1;
%assign/vec4 v00000211cee5d7d0_0, 0;
%assign/vec4 v00000211cee5d870_0, 0;
%jmp T_0.1;
T_0.0 ;
%pushi/vec4 14, 0, 4;
%split/vec4 1;
%assign/vec4 v00000211cee5d600_0, 0;
%split/vec4 1;
%assign/vec4 v00000211cee5d730_0, 0;
%split/vec4 1;
%assign/vec4 v00000211cee5d7d0_0, 0;
%assign/vec4 v00000211cee5d870_0, 0;
T_0.1 ;
%pushi/vec4 4278124286, 0, 32;
%concati/vec4 4278124286, 0, 32;
%concati/vec4 4278124134, 0, 32;
%concati/vec4 4074397950, 0, 32;
%load/vec4 v00000211cee5d910_0;
%parti/s 4, 0, 2;
%ix/load 5, 3, 0;
%flag_set/imm 4, 0;
%shiftl 5;
%ix/vec4 4;
%shiftr 4;
%ix/load 4, 1, 0;
%flag_set/imm 4, 0;
%shiftr 4;
%load/vec4 v00000211cee5d910_0;
%parti/s 1, 4, 4;
%concat/vec4; draw_concat_vec4
%pad/u 8;
%split/vec4 1;
%assign/vec4 v00000211cee145f0_0, 0;
%split/vec4 1;
%assign/vec4 v00000211cee5d560_0, 0;
%split/vec4 1;
%assign/vec4 v00000211cee5d4c0_0, 0;
%split/vec4 1;
%assign/vec4 v00000211cee5d420_0, 0;
%split/vec4 1;
%assign/vec4 v00000211cee14550_0, 0;
%split/vec4 1;
%assign/vec4 v00000211cee144b0_0, 0;
%split/vec4 1;
%assign/vec4 v00000211cef46710_0, 0;
%assign/vec4 v00000211cef46b40_0, 0;
%jmp T_0;
.thread T_0, $push;
# The file index is used to find the file name in the following table.
:file_names 3;
"N/A";

53
led/led_1.v
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@ -11,7 +11,7 @@ wire [WIDTH:0] tmp1, tmp2; // 定义两个 线类型信号, 宽度为 常量 WI
reg [WIDTH:0]v_reg; // 定义一个 寄存器类型, 宽度为 6bit 寄存器类型在下一次触发机制到来之前, 保留原值
wire [WIDTH:0]v_wire; // 定义一个 线类型, 宽度为 6bit
always @(*) begin // * 表示内部的任何变量发生变化的时候, 就会并行执行该 block
always @(*) begin // * 表示内部的任何变量发生变化的时候, 就会并行执行该 block, 但是排除左值(可能会发生震荡?)
// 该块 没有带时钟信号, 虽然内部产生的信号定义还是 reg型的, 但是他并没有产生时序逻辑, 还是组合逻辑, 只有带时钟信号之后, 才会使用真正的存储单元/寄存器
// begin ... end 表示改语句是一个块, 块内的语句是一体的, 如果没有begin ... end, 则只会执行 always 下面紧挨着的 1行!
led = !key; // 对reg 类型变量 阻塞赋值, 他执行完毕, 才会执行下面的
@ -27,10 +27,16 @@ assign v_wire[1] = v_reg[1]; // 把 v_wire 线中 下标1的位置直接连到
// 信号的位宽
// 信号宽度默认是 1bit, 可以省略不写
// 信号宽度默认是 1bit, 可以省略不写, 注意 位宽不是 数的位数这通常在非二进制数中容易造成混淆
parameter w_1 = 4'd4; // 这个是 4位宽, 而不是由4位数, 这个变量实际也是 0'b0100
wire c;
assign c = 1'b1 + 1'b1; // c的宽度是 1bit, 这个加法溢出了, 溢出的丢失, 所以c 是 1'b0
wire f;
assign f = 1 + 1; // 这里的 1没有些宽度, 默认是32位宽, 但是wire 默认是1位宽, 所以 溢出的全部舍去 f为 1'b10
wire [2:0]g;
assign g = 1'b1 + 1'b1; // 位宽受到左值的影响, 这里 1'b1 + 1'b1 虽然溢出了, 但是却能保存下来, 此时g的值是 2'b10
wire a;
wire b;
@ -44,4 +50,47 @@ wire [1:0]ret;
assign {ret[1], ret[0]} = a + b; // 把结果和进位 拼接到位宽为 2 的 ret中
// 逻辑运算
wire [2:0]l_a;
wire [2:0]l_b;
wire l_c;
assign l_c = l_a && l_b; // l_a会被认为是一个整体, 这段代码会生成 (l_a[0] || l_a[0] || l_a[0]) && (l_ab0] || l_b[0] || l_b[0]) 也就是按位或之后再与, l_a || l_b 与之相同的逻辑 不过是 按位或之后, 再或
// 按位逻辑运算符
// 单目的按位与, 被与数的左侧 没有操作数
wire [4:0] W, V;
assign V = &W; // 这里只是单纯的与W, 注意这里是把 W每位进行相与, 其实就是 V = W[3] & W[2] & W[1] & W[0], 如果 A等于 0b0110, 那么C 就等于 4'b0;
// 双目按位与
wire [4:0]U;
assign U = W & V; // 连个操作数 按位相与 赋值给U, 如果某个操作数宽度不够, 则对宽度小的操作数在左侧补0
// 逻辑运算符 && || ! 只有1或者0 两个结果, 而 | & ^ ~ 则可以对多位进行操作得到多位的结果
// 比较运算符
// 比较的时候如果操作数其中有一位是x或者z, 那么结果就是未知 x
// 移位运算, 移位的操作是补零
// 移位操作是不消耗资源的, 他只是线的连接, 不过如果移位宽度是一个变量而不是常量, 那么综合出来可能会使用多路选择器来控制选择移多少位
wire [4:0]Y1;
wire [4:0]Y2;
assign Y1 = 4'b0110;
assign Y2 = Y1 << 2; // 移位运算符 也要受到 位宽的约束, 这里Y2位宽是4, 所以Y1的值左移两位 传给 Y2, Y2此时的值是 1000, 内部其实就是把Y2[3:2] 直接连到 Y1上的最低两位[1:0]
// 切片/选择语句, a可以是一个可以变的数, 但是b 必须是一个常数
// [a-: b] 表示获取 从 a开始获取比a下标小的数, 一共获取 b位
// [a+: b] 表示获取 比a下标大的数, 一共获取 b位
wire [16:0] Slice;
// Slice[6-:3] 等同于 Slice[6:4]
// Slice[2+:3] 等同于 Slice[4:2]
// 拼接运算符
// 拼接运算符不允许不写位宽!! {A[0], 5} 后面的5没有写位宽是禁止的 因为默认是32位或者不知道多少位拼接在一起了
endmodule

148
led/led_1.v.out
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@ -1,68 +1,104 @@
#! /usr/local/Cellar/icarus-verilog/12.0/bin/vvp
:ivl_version "12.0 (stable)";
#! /c/Source/iverilog-install/bin/vvp
:ivl_version "12.0 (devel)" "(s20150603-1539-g2693dd32b)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision + 0;
:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/system.vpi";
:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/vhdl_sys.vpi";
:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/vhdl_textio.vpi";
:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/v2005_math.vpi";
:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/va_math.vpi";
S_0x7f7a4de099a0 .scope module, "led" "led" 2 1;
:vpi_module "C:\iverilog\lib\ivl\system.vpi";
:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi";
:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi";
:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi";
:vpi_module "C:\iverilog\lib\ivl\va_math.vpi";
S_0000026063717710 .scope module, "led" "led" 2 1;
.timescale 0 0;
.port_info 0 /INPUT 1 "key";
.port_info 1 /OUTPUT 1 "led";
P_0x7f7a4de09b10 .param/l "WIDTH" 0 2 6, +C4<00000000000000000000000000000101>;
o0x7f7a4dd322d8 .functor BUFZ 1, C4<z>; HiZ drive
L_0x7f7a4de18e80 .functor BUFZ 1, o0x7f7a4dd322d8, C4<0>, C4<0>, C4<0>;
L_0x7f7a4dd630e0 .functor BUFT 1, C4<01>, C4<0>, C4<0>, C4<0>;
v0x7f7a4de06240_0 .net *"_ivl_17", 1 0, L_0x7f7a4dd630e0; 1 drivers
L_0x7f7a4dd63128 .functor BUFT 1, C4<01>, C4<0>, C4<0>, C4<0>;
v0x7f7a4de188f0_0 .net *"_ivl_21", 1 0, L_0x7f7a4dd63128; 1 drivers
v0x7f7a4de18990_0 .net *"_ivl_25", 1 0, L_0x7f7a4de19b40; 1 drivers
v0x7f7a4de18a40_0 .net *"_ivl_27", 0 0, L_0x7f7a4de19d30; 1 drivers
v0x7f7a4de18af0_0 .net *"_ivl_29", 0 0, L_0x7f7a4de19e10; 1 drivers
v0x7f7a4de18be0_0 .net *"_ivl_3", 0 0, L_0x7f7a4de18e80; 1 drivers
L_0x7f7a4dd63170 .functor BUFT 1, C4<01>, C4<0>, C4<0>, C4<0>;
v0x7f7a4de18c90_0 .net *"_ivl_35", 1 0, L_0x7f7a4dd63170; 1 drivers
L_0x7f7a4dd631b8 .functor BUFT 1, C4<01>, C4<0>, C4<0>, C4<0>;
v0x7f7a4de18d40_0 .net *"_ivl_39", 1 0, L_0x7f7a4dd631b8; 1 drivers
v0x7f7a4de18df0_0 .net *"_ivl_43", 1 0, L_0x7f7a4de19f70; 1 drivers
o0x7f7a4dd321b8 .functor BUFZ 4, C4<zzzz>; HiZ drive
; Elide local net with no drivers, v0x7f7a4de18f00_0 name=_ivl_49
v0x7f7a4de18fb0_0 .net *"_ivl_7", 0 0, L_0x7f7a4de19800; 1 drivers
L_0x7f7a4dd63050 .functor BUFT 1, C4<1>, C4<0>, C4<0>, C4<0>;
v0x7f7a4de19060_0 .net "a", 0 0, L_0x7f7a4dd63050; 1 drivers
L_0x7f7a4dd63098 .functor BUFT 1, C4<1>, C4<0>, C4<0>, C4<0>;
v0x7f7a4de19100_0 .net "b", 0 0, L_0x7f7a4dd63098; 1 drivers
L_0x7f7a4dd63008 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v0x7f7a4de191a0_0 .net "c", 0 0, L_0x7f7a4dd63008; 1 drivers
v0x7f7a4de19240_0 .net "d", 0 0, L_0x7f7a4de19a40; 1 drivers
v0x7f7a4de192e0_0 .net "key", 0 0, o0x7f7a4dd322d8; 0 drivers
v0x7f7a4de19380_0 .var "led", 0 0;
v0x7f7a4de19510_0 .net "ret", 1 0, L_0x7f7a4de19c60; 1 drivers
v0x7f7a4de195a0_0 .net "s", 0 0, L_0x7f7a4de19960; 1 drivers
v0x7f7a4de19630_0 .var "v_reg", 5 0;
v0x7f7a4de196e0_0 .net "v_wire", 5 0, L_0x7f7a4de1a070; 1 drivers
E_0x7f7a4de062f0 .event anyedge, v0x7f7a4de192e0_0;
L_0x7f7a4de19800 .part v0x7f7a4de19630_0, 1, 1;
L_0x7f7a4de19960 .part L_0x7f7a4de19b40, 1, 1;
L_0x7f7a4de19a40 .part L_0x7f7a4de19b40, 0, 1;
L_0x7f7a4de19b40 .arith/sum 2, L_0x7f7a4dd630e0, L_0x7f7a4dd63128;
L_0x7f7a4de19c60 .concat8 [ 1 1 0 0], L_0x7f7a4de19e10, L_0x7f7a4de19d30;
L_0x7f7a4de19d30 .part L_0x7f7a4de19f70, 1, 1;
L_0x7f7a4de19e10 .part L_0x7f7a4de19f70, 0, 1;
L_0x7f7a4de19f70 .arith/sum 2, L_0x7f7a4dd63170, L_0x7f7a4dd631b8;
L_0x7f7a4de1a070 .concat [ 1 1 4 0], L_0x7f7a4de18e80, L_0x7f7a4de19800, o0x7f7a4dd321b8;
.scope S_0x7f7a4de099a0;
P_000002606380a730 .param/l "WIDTH" 0 2 6, +C4<00000000000000000000000000000101>;
o000002606372d498 .functor BUFZ 1, C4<z>; HiZ drive
L_0000026063726ff0 .functor BUFZ 1, o000002606372d498, C4<0>, C4<0>, C4<0>;
L_00000260637275a0 .functor AND 1, L_00000260637223f0, L_0000026063722210, C4<1>, C4<1>;
o000002606372cf58 .functor BUFZ 5, C4<zzzzz>; HiZ drive
L_0000026063727060 .functor AND 5, o000002606372cf58, L_00000260637222b0, C4<11111>, C4<11111>;
v0000026063718850_0 .net "U", 4 0, L_0000026063727060; 1 drivers
v0000026063718710_0 .net "V", 4 0, L_00000260637222b0; 1 drivers
v00000260637191b0_0 .net "W", 4 0, o000002606372cf58; 0 drivers
L_000002606377e1c8 .functor BUFT 1, C4<00110>, C4<0>, C4<0>, C4<0>;
v0000026063719390_0 .net "Y1", 4 0, L_000002606377e1c8; 1 drivers
v0000026063718ad0_0 .net "Y2", 4 0, L_0000026063723a70; 1 drivers
L_000002606377e258 .functor BUFT 1, C4<01>, C4<0>, C4<0>, C4<0>;
v0000026063718990_0 .net *"_ivl_21", 1 0, L_000002606377e258; 1 drivers
L_000002606377e2a0 .functor BUFT 1, C4<01>, C4<0>, C4<0>, C4<0>;
v0000026063718a30_0 .net *"_ivl_25", 1 0, L_000002606377e2a0; 1 drivers
v0000026063718c10_0 .net *"_ivl_29", 1 0, L_0000026063723750; 1 drivers
v0000026063718cb0_0 .net *"_ivl_3", 0 0, L_0000026063726ff0; 1 drivers
v0000026063718df0_0 .net *"_ivl_31", 0 0, L_00000260637239d0; 1 drivers
v0000026063718fd0_0 .net *"_ivl_33", 0 0, L_0000026063722df0; 1 drivers
L_000002606377e2e8 .functor BUFT 1, C4<01>, C4<0>, C4<0>, C4<0>;
v0000026063718e90_0 .net *"_ivl_39", 1 0, L_000002606377e2e8; 1 drivers
L_000002606377e330 .functor BUFT 1, C4<01>, C4<0>, C4<0>, C4<0>;
v0000026063719250_0 .net *"_ivl_43", 1 0, L_000002606377e330; 1 drivers
v0000026063723430_0 .net *"_ivl_47", 1 0, L_0000026063722170; 1 drivers
L_000002606377e0f0 .functor BUFT 1, C4<000>, C4<0>, C4<0>, C4<0>;
v0000026063723c50_0 .net/2u *"_ivl_49", 2 0, L_000002606377e0f0; 1 drivers
v00000260637231b0_0 .net *"_ivl_51", 0 0, L_00000260637223f0; 1 drivers
L_000002606377e138 .functor BUFT 1, C4<000>, C4<0>, C4<0>, C4<0>;
v0000026063722710_0 .net/2u *"_ivl_53", 2 0, L_000002606377e138; 1 drivers
v0000026063723890_0 .net *"_ivl_55", 0 0, L_0000026063722210; 1 drivers
v0000026063723bb0_0 .net *"_ivl_60", 0 0, L_0000026063722990; 1 drivers
L_000002606377e180 .functor BUFT 1, C4<0000>, C4<0>, C4<0>, C4<0>;
v0000026063722490_0 .net *"_ivl_64", 3 0, L_000002606377e180; 1 drivers
v0000026063723cf0_0 .net *"_ivl_7", 0 0, L_0000026063723610; 1 drivers
v0000026063723d90_0 .net *"_ivl_71", 2 0, L_0000026063723110; 1 drivers
L_000002606377e210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>;
v0000026063722b70_0 .net *"_ivl_73", 1 0, L_000002606377e210; 1 drivers
o000002606372d348 .functor BUFZ 4, C4<zzzz>; HiZ drive
; Elide local net with no drivers, v0000026063722850_0 name=_ivl_79
L_000002606377e060 .functor BUFT 1, C4<1>, C4<0>, C4<0>, C4<0>;
v0000026063722ad0_0 .net "a", 0 0, L_000002606377e060; 1 drivers
L_000002606377e0a8 .functor BUFT 1, C4<1>, C4<0>, C4<0>, C4<0>;
v0000026063723930_0 .net "b", 0 0, L_000002606377e0a8; 1 drivers
L_000002606377df88 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v00000260637232f0_0 .net "c", 0 0, L_000002606377df88; 1 drivers
v0000026063721f90_0 .net "d", 0 0, L_00000260637236b0; 1 drivers
L_000002606377dfd0 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
v0000026063722c10_0 .net "f", 0 0, L_000002606377dfd0; 1 drivers
L_000002606377e018 .functor BUFT 1, C4<010>, C4<0>, C4<0>, C4<0>;
v0000026063722030_0 .net "g", 2 0, L_000002606377e018; 1 drivers
v00000260637237f0_0 .net "key", 0 0, o000002606372d498; 0 drivers
o000002606372d4c8 .functor BUFZ 3, C4<zzz>; HiZ drive
v0000026063723390_0 .net "l_a", 2 0, o000002606372d4c8; 0 drivers
o000002606372d4f8 .functor BUFZ 3, C4<zzz>; HiZ drive
v00000260637220d0_0 .net "l_b", 2 0, o000002606372d4f8; 0 drivers
v0000026063722530_0 .net "l_c", 0 0, L_00000260637275a0; 1 drivers
v0000026063722e90_0 .var "led", 0 0;
v0000026063722f30_0 .net "ret", 1 0, L_0000026063723070; 1 drivers
v00000260637234d0_0 .net "s", 0 0, L_00000260637225d0; 1 drivers
v0000026063723570_0 .var "v_reg", 5 0;
v0000026063721ef0_0 .net "v_wire", 5 0, L_0000026063723b10; 1 drivers
E_000002606380a4b0 .event anyedge, v00000260637237f0_0;
L_0000026063723610 .part v0000026063723570_0, 1, 1;
L_00000260637225d0 .part L_0000026063723750, 1, 1;
L_00000260637236b0 .part L_0000026063723750, 0, 1;
L_0000026063723750 .arith/sum 2, L_000002606377e258, L_000002606377e2a0;
L_0000026063723070 .concat8 [ 1 1 0 0], L_0000026063722df0, L_00000260637239d0;
L_00000260637239d0 .part L_0000026063722170, 1, 1;
L_0000026063722df0 .part L_0000026063722170, 0, 1;
L_0000026063722170 .arith/sum 2, L_000002606377e2e8, L_000002606377e330;
L_00000260637223f0 .cmp/ne 3, o000002606372d4c8, L_000002606377e0f0;
L_0000026063722210 .cmp/ne 3, o000002606372d4f8, L_000002606377e138;
L_0000026063722990 .reduce/and o000002606372cf58;
L_00000260637222b0 .concat [ 1 4 0 0], L_0000026063722990, L_000002606377e180;
L_0000026063723110 .part L_000002606377e1c8, 0, 3;
L_0000026063723a70 .concat [ 2 3 0 0], L_000002606377e210, L_0000026063723110;
L_0000026063723b10 .concat [ 1 1 4 0], L_0000026063726ff0, L_0000026063723610, o000002606372d348;
.scope S_0000026063717710;
T_0 ;
%wait E_0x7f7a4de062f0;
%load/vec4 v0x7f7a4de192e0_0;
%wait E_000002606380a4b0;
%load/vec4 v00000260637237f0_0;
%nor/r;
%store/vec4 v0x7f7a4de19380_0, 0, 1;
%load/vec4 v0x7f7a4de192e0_0;
%store/vec4 v0000026063722e90_0, 0, 1;
%load/vec4 v00000260637237f0_0;
%ix/load 4, 1, 0;
%flag_set/imm 4, 0;
%store/vec4 v0x7f7a4de19630_0, 4, 1;
%store/vec4 v0000026063723570_0, 4, 1;
%jmp T_0;
.thread T_0, $push;
# The file index is used to find the file name in the following table.

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