#! /usr/local/Cellar/icarus-verilog/12.0/bin/vvp :ivl_version "12.0 (stable)"; :ivl_delay_selection "TYPICAL"; :vpi_time_precision + 0; :vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/system.vpi"; :vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/vhdl_sys.vpi"; :vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/vhdl_textio.vpi"; :vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/v2005_math.vpi"; :vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/va_math.vpi"; S_0x7fc906406830 .scope module, "mul" "mul" 2 1; .timescale 0 0; .port_info 0 /INPUT 1 "sys_clk"; .port_info 1 /INPUT 1 "sys_rst"; P_0x7fc906406fb0 .param/l "t_1" 0 2 7, +C4<00000000000000000000000000001000>; P_0x7fc906406ff0 .param/l "t_2" 0 2 24, +C4<00000000000000000000000000010000>; P_0x7fc906407030 .param/l "t_3" 0 2 42, +C4<00000000000000000000000000011100>; v0x7fc906407770_0 .net *"_ivl_1", 7 0, L_0x7fc906418af0; 1 drivers v0x7fc906418030_0 .net *"_ivl_5", 15 0, L_0x7fc906418c70; 1 drivers v0x7fc9064180d0_0 .net *"_ivl_9", 27 0, L_0x7fc906418e50; 1 drivers v0x7fc906418180_0 .var "a_16", 15 0; v0x7fc9064182d0_0 .var "a_28", 27 0; v0x7fc906418420_0 .var "a_8", 7 0; v0x7fc9064184b0_0 .var "b_16", 15 0; v0x7fc906418560_0 .var "b_28", 27 0; v0x7fc906418630_0 .var "b_8", 7 0; v0x7fc906418770_0 .net "o_18", 0 0, L_0x7fc906418d70; 1 drivers v0x7fc906418800_0 .net "o_28", 0 0, L_0x7fc906418f40; 1 drivers v0x7fc9064188c0_0 .net "o_8", 0 0, L_0x7fc906418b90; 1 drivers o0x7fc906532248 .functor BUFZ 1, C4; HiZ drive v0x7fc906418980_0 .net "sys_clk", 0 0, o0x7fc906532248; 0 drivers o0x7fc906532278 .functor BUFZ 1, C4; HiZ drive v0x7fc906418a20_0 .net "sys_rst", 0 0, o0x7fc906532278; 0 drivers E_0x7fc906407670/0 .event negedge, v0x7fc906418a20_0; E_0x7fc906407670/1 .event posedge, v0x7fc906418980_0; E_0x7fc906407670 .event/or E_0x7fc906407670/0, E_0x7fc906407670/1; L_0x7fc906418af0 .arith/mult 8, v0x7fc906418420_0, v0x7fc906418630_0; L_0x7fc906418b90 .part L_0x7fc906418af0, 0, 1; L_0x7fc906418c70 .arith/mult 16, v0x7fc906418180_0, v0x7fc9064184b0_0; L_0x7fc906418d70 .part L_0x7fc906418c70, 0, 1; L_0x7fc906418e50 .arith/mult 28, v0x7fc9064182d0_0, v0x7fc906418560_0; L_0x7fc906418f40 .part L_0x7fc906418e50, 0, 1; .scope S_0x7fc906406830; T_0 ; %pushi/vec4 1, 0, 8; %store/vec4 v0x7fc906418420_0, 0, 8; %pushi/vec4 1, 0, 8; %store/vec4 v0x7fc906418630_0, 0, 8; %pushi/vec4 1, 0, 16; %store/vec4 v0x7fc906418180_0, 0, 16; %pushi/vec4 1, 0, 16; %store/vec4 v0x7fc9064184b0_0, 0, 16; %pushi/vec4 24, 0, 28; %store/vec4 v0x7fc9064182d0_0, 0, 28; %pushi/vec4 1, 0, 28; %store/vec4 v0x7fc906418560_0, 0, 28; %end; .thread T_0; .scope S_0x7fc906406830; T_1 ; %wait E_0x7fc906407670; %load/vec4 v0x7fc906418a20_0; %nor/r; %flag_set/vec4 8; %jmp/0xz T_1.0, 8; %pushi/vec4 1, 0, 8; %assign/vec4 v0x7fc906418420_0, 0; %pushi/vec4 1, 0, 8; %assign/vec4 v0x7fc906418630_0, 0; %jmp T_1.1; T_1.0 ; %load/vec4 v0x7fc906418420_0; %addi 1, 0, 8; %assign/vec4 v0x7fc906418420_0, 0; %load/vec4 v0x7fc906418630_0; %addi 1, 0, 8; %assign/vec4 v0x7fc906418630_0, 0; T_1.1 ; %jmp T_1; .thread T_1; .scope S_0x7fc906406830; T_2 ; %wait E_0x7fc906407670; %load/vec4 v0x7fc906418a20_0; %nor/r; %flag_set/vec4 8; %jmp/0xz T_2.0, 8; %pushi/vec4 1, 0, 16; %assign/vec4 v0x7fc906418180_0, 0; %pushi/vec4 1, 0, 16; %assign/vec4 v0x7fc9064184b0_0, 0; %jmp T_2.1; T_2.0 ; %load/vec4 v0x7fc906418180_0; %addi 1, 0, 16; %assign/vec4 v0x7fc906418180_0, 0; %load/vec4 v0x7fc9064184b0_0; %addi 1, 0, 16; %assign/vec4 v0x7fc9064184b0_0, 0; T_2.1 ; %jmp T_2; .thread T_2; .scope S_0x7fc906406830; T_3 ; %wait E_0x7fc906407670; %load/vec4 v0x7fc906418a20_0; %nor/r; %flag_set/vec4 8; %jmp/0xz T_3.0, 8; %pushi/vec4 1, 0, 28; %assign/vec4 v0x7fc9064182d0_0, 0; %pushi/vec4 1, 0, 28; %assign/vec4 v0x7fc906418560_0, 0; %jmp T_3.1; T_3.0 ; %load/vec4 v0x7fc9064182d0_0; %addi 1, 0, 28; %assign/vec4 v0x7fc9064182d0_0, 0; %load/vec4 v0x7fc906418560_0; %addi 1, 0, 28; %assign/vec4 v0x7fc906418560_0, 0; T_3.1 ; %jmp T_3; .thread T_3; # The file index is used to find the file name in the following table. :file_names 3; "N/A"; ""; "mul.v";