Updated logging to use simplelog; added basic install.rhai script

Cargo.toml

@@ -1,3 +1,9 @@
+[profile.bench]
+debug = true
+
+[profile.release]
+lto = "fat"
+
 [workspace]
 members = [
     "leechcore-sys",
@@ -7,6 +13,3 @@ default-members = [
     "leechcore-sys",
     "memflow-pcileech",
 ]
-
-[profile.release]
-lto = true

install.rhai

@@ -0,0 +1,27 @@
+
+// builds the connector from a given path (never called by the engine directly)
+fn build_from_path(ctx, repo_path) {
+	info("Installing connector");
+	cargo("build --release --all-features", repo_path);
+	ctx.copy_cargo_plugin_artifact(repo_path, name_to_lib(ctx.crate_name()));
+
+	// TODO: download leechcore_ft601_driver_linux
+}
+
+// builds the connector from local path
+fn build_local(ctx) {
+	build_from_path(ctx, ctx.build_path())
+}
+
+fn get_source(ctx) {
+	ctx.clone_repository()
+}
+
+// builds the connector from source
+fn build_from_source(ctx) {
+	build_from_path(ctx, get_source(ctx))
+}
+
+// downloads a binary release of the plugin, still needs dkms
+fn install(ctx) {
+}

memflow-pcileech/Cargo.toml

@@ -17,12 +17,12 @@ crate-type = ["lib", "cdylib"]
 
 [dependencies]
 memflow = { git = "https://github.com/memflow/memflow", branch = "next", features = ["plugins", "memmapfiles"] }
-log = { version = "0.4", default-features = false }
 leechcore-sys = { path = "../leechcore-sys" }
+log = "^0.4.14"
 
 [dev-dependencies]
-clap = "2.33"
-simple_logger = "1.0"
+clap = { version = "^3.0.5", features = ["cargo"] }
+simplelog = "^0.11.1"
 memflow-win32 = { git = "https://github.com/memflow/memflow-win32", branch = "main" }
 
 [[example]]

memflow-pcileech/examples/ps_inventory.rs

@@ -22,23 +22,27 @@ use log::{info, Level};
 use memflow::prelude::v1::*;
 
 fn main() {
-    simple_logger::SimpleLogger::new()
-        .with_level(Level::Debug.to_level_filter())
-        .init()
+    simplelog::TermLogger::init(
+        Level::Debug.to_level_filter(),
+        simplelog::Config::default(),
+        simplelog::TerminalMode::Stdout,
+        simplelog::ColorChoice::Auto,
+    )
     .unwrap();
 
     let connector_args = if let Some(arg) = args().nth(1) {
-        Args::parse(arg.as_ref()).expect("unable to parse command line arguments")
+        arg.parse()
     } else {
-        Args::new().insert("device", "FPGA")
-    };
+        "device=FPGA".parse()
+    }
+    .expect("unable to parse command line arguments");
 
     let inventory = Inventory::scan();
     let connector = inventory
-        .create_connector("pcileech", None, &connector_args)
+        .create_connector("pcileech", None, Some(&connector_args))
         .expect("unable to create pcileech connector");
     let mut os = inventory
-        .create_os("win32", Some(connector), &Args::default())
+        .create_os("win32", Some(connector), None)
         .expect("unable to create win32 instance with pcileech connector");
 
     let process_list = os.process_info_list().expect("unable to read process list");

memflow-pcileech/examples/ps_win32.rs

@@ -21,16 +21,20 @@ use memflow::prelude::v1::*;
 use memflow_win32::prelude::v1::*;
 
 fn main() {
-    simple_logger::SimpleLogger::new()
-        .with_level(Level::Debug.to_level_filter())
-        .init()
+    simplelog::TermLogger::init(
+        Level::Debug.to_level_filter(),
+        simplelog::Config::default(),
+        simplelog::TerminalMode::Stdout,
+        simplelog::ColorChoice::Auto,
+    )
     .unwrap();
 
     let connector_args = if let Some(arg) = args().nth(1) {
-        Args::parse(arg.as_ref()).expect("unable to parse command line arguments")
+        arg.parse()
     } else {
-        Args::new().insert("device", "FPGA")
-    };
+        "device=FPGA".parse()
+    }
+    .expect("unable to parse command line arguments");
 
     let connector = memflow_pcileech::create_connector(&connector_args)
         .expect("unable to create pcileech connector");

memflow-pcileech/examples/read_phys.rs

@@ -11,16 +11,20 @@ use log::{info, Level};
 use memflow::prelude::v1::*;
 
 fn main() {
-    simple_logger::SimpleLogger::new()
-        .with_level(Level::Debug.to_level_filter())
-        .init()
+    simplelog::TermLogger::init(
+        Level::Debug.to_level_filter(),
+        simplelog::Config::default(),
+        simplelog::TerminalMode::Stdout,
+        simplelog::ColorChoice::Auto,
+    )
     .unwrap();
 
     let connector_args = if let Some(arg) = args().nth(1) {
-        Args::parse(arg.as_ref()).expect("unable to parse command line arguments")
+        arg.parse()
     } else {
-        Args::new().insert("device", "FPGA")
-    };
+        "device=FPGA".parse()
+    }
+    .expect("unable to parse command line arguments");
 
     let mut connector = memflow_pcileech::create_connector(&connector_args)
         .expect("unable to create pcileech connector");

memflow-pcileech/src/lib.rs

@@ -414,6 +414,7 @@ impl PhysicalMemory for PciLeech {
 
 fn validator() -> ArgsValidator {
     ArgsValidator::new()
+        .arg(ArgDescriptor::new("default").description("the target device to be used by LeechCore"))
         .arg(ArgDescriptor::new("device").description("the target device to be used by LeechCore"))
         .arg(ArgDescriptor::new("memmap").description("the memory map file of the target machine"))
 }
@@ -422,16 +423,20 @@ fn validator() -> ArgsValidator {
 #[connector(name = "pcileech", help_fn = "help", target_list_fn = "target_list")]
 pub fn create_connector(args: &ConnectorArgs) -> Result<PciLeech> {
     let validator = validator();
-    match validator.validate(&args.extra_args) {
+
+    let args = &args.extra_args;
+
+    match validator.validate(args) {
         Ok(_) => {
-            let device = args.extra_args
+            let device = args
                 .get("device")
+                .or_else(|| args.get_default())
                 .ok_or_else(|| {
                     Error(ErrorOrigin::Connector, ErrorKind::ArgValidation)
                         .log_error("'device' argument is missing")
                 })?;
 
-            if let Some(memmap) = args.extra_args.get("memmap") {
+            if let Some(memmap) = args.get("memmap") {
                 PciLeech::with_mem_map_file(device, memmap)
             } else {
                 PciLeech::new(device)
@@ -466,5 +471,6 @@ Available arguments are:
 
 /// Retrieve a list of all currently available PciLeech targets.
 pub fn target_list() -> Result<Vec<TargetInfo>> {
+    // TODO: check if usb is connected, then list 1 target
     Ok(vec![])
 }