仿真通过

main
阳光少年 8 months ago
parent 720eabcfe4
commit 77caedf906

BIN
.DS_Store vendored

Binary file not shown.

@ -21,17 +21,16 @@ end
always #10 sys_clk = ~sys_clk; always #10 sys_clk = ~sys_clk;
reg [25:0] CNT; reg [5:0] CNT;
always @(posedge sys_clk or negedge sys_rst) begin always @(posedge sys_clk or negedge sys_rst) begin
if (sys_rst == 1'b0) begin if (sys_rst == 1'b0) begin
CNT <= 25'd0; CNT <= 5'd0;
end end
else if (CNT < (25'd25 - 25'd1)) begin else if (CNT < (5'd25 - 5'd1)) begin
CNT <= CNT + 25'd1; CNT <= CNT + 5'd1;
end end
else begin else begin
CNT <= 25'b0; CNT <= 5'b0;
end end
end end
@ -42,12 +41,11 @@ always @(posedge sys_clk or negedge sys_rst) begin
if (sys_rst == 1'b0) begin if (sys_rst == 1'b0) begin
data <= 8'b1_00_0_0000; data <= 8'b1_00_0_0000;
end end
else if (CNT == (25'd25 - 25'd1)) begin else if (CNT == (5'd25 - 5'd1)) begin
data[3:0] <= data[3:0] + 4'b1; data[3:0] <= data[3:0] + 4'b1;
data[6:5] <= data[6:5] + 2'b1; data[6:5] <= data[6:5] + 2'b1;
end end
else begin else begin
end end
end end

@ -0,0 +1,97 @@
#! /usr/local/Cellar/icarus-verilog/12.0/bin/vvp
:ivl_version "12.0 (stable)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision - 9;
:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/system.vpi";
:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/vhdl_sys.vpi";
:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/vhdl_textio.vpi";
:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/v2005_math.vpi";
:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/va_math.vpi";
S_0x7f9736404160 .scope module, "tb_dt" "tb_dt" 2 2;
.timescale -9 -9;
v0x7f9736404340_0 .var "CNT", 5 0;
v0x7f97365140b0_0 .var "data", 7 0;
v0x7f9736514160_0 .var "sys_clk", 0 0;
v0x7f9736514210_0 .var "sys_rst", 0 0;
E_0x7f97364042e0/0 .event negedge, v0x7f9736514210_0;
E_0x7f97364042e0/1 .event posedge, v0x7f9736514160_0;
E_0x7f97364042e0 .event/or E_0x7f97364042e0/0, E_0x7f97364042e0/1;
.scope S_0x7f9736404160;
T_0 ;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x7f9736514160_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x7f9736514210_0, 0;
%delay 200, 0;
%pushi/vec4 1, 0, 1;
%assign/vec4 v0x7f9736514210_0, 0;
%end;
.thread T_0;
.scope S_0x7f9736404160;
T_1 ;
%delay 10, 0;
%load/vec4 v0x7f9736514160_0;
%inv;
%store/vec4 v0x7f9736514160_0, 0, 1;
%jmp T_1;
.thread T_1;
.scope S_0x7f9736404160;
T_2 ;
%wait E_0x7f97364042e0;
%load/vec4 v0x7f9736514210_0;
%cmpi/e 0, 0, 1;
%jmp/0xz T_2.0, 4;
%pushi/vec4 0, 0, 6;
%assign/vec4 v0x7f9736404340_0, 0;
%jmp T_2.1;
T_2.0 ;
%load/vec4 v0x7f9736404340_0;
%cmpi/u 24, 0, 6;
%jmp/0xz T_2.2, 5;
%load/vec4 v0x7f9736404340_0;
%addi 1, 0, 6;
%assign/vec4 v0x7f9736404340_0, 0;
%jmp T_2.3;
T_2.2 ;
%pushi/vec4 0, 0, 6;
%assign/vec4 v0x7f9736404340_0, 0;
T_2.3 ;
T_2.1 ;
%jmp T_2;
.thread T_2;
.scope S_0x7f9736404160;
T_3 ;
%wait E_0x7f97364042e0;
%load/vec4 v0x7f9736514210_0;
%cmpi/e 0, 0, 1;
%jmp/0xz T_3.0, 4;
%pushi/vec4 128, 0, 8;
%assign/vec4 v0x7f97365140b0_0, 0;
%jmp T_3.1;
T_3.0 ;
%load/vec4 v0x7f9736404340_0;
%cmpi/e 24, 0, 6;
%jmp/0xz T_3.2, 4;
%load/vec4 v0x7f97365140b0_0;
%parti/s 4, 0, 2;
%addi 1, 0, 4;
%ix/load 4, 0, 0;
%ix/load 5, 0, 0;
%flag_set/imm 4, 0;
%assign/vec4/off/d v0x7f97365140b0_0, 4, 5;
%load/vec4 v0x7f97365140b0_0;
%parti/s 2, 5, 4;
%addi 1, 0, 2;
%ix/load 4, 5, 0;
%ix/load 5, 0, 0;
%flag_set/imm 4, 0;
%assign/vec4/off/d v0x7f97365140b0_0, 4, 5;
T_3.2 ;
T_3.1 ;
%jmp T_3;
.thread T_3;
# The file index is used to find the file name in the following table.
:file_names 3;
"N/A";
"<interactive>";
"tb_dt.v";

@ -1,13 +1,13 @@
#! /c/Source/iverilog-install/bin/vvp #! /usr/local/Cellar/icarus-verilog/12.0/bin/vvp
:ivl_version "12.0 (devel)" "(s20150603-1539-g2693dd32b)"; :ivl_version "12.0 (stable)";
:ivl_delay_selection "TYPICAL"; :ivl_delay_selection "TYPICAL";
:vpi_time_precision + 0; :vpi_time_precision + 0;
:vpi_module "C:\iverilog\lib\ivl\system.vpi"; :vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/system.vpi";
:vpi_module "C:\iverilog\lib\ivl\vhdl_sys.vpi"; :vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/vhdl_sys.vpi";
:vpi_module "C:\iverilog\lib\ivl\vhdl_textio.vpi"; :vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/vhdl_textio.vpi";
:vpi_module "C:\iverilog\lib\ivl\v2005_math.vpi"; :vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/v2005_math.vpi";
:vpi_module "C:\iverilog\lib\ivl\va_math.vpi"; :vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/va_math.vpi";
S_00000256bb3769e0 .scope module, "lm" "lm" 2 1; S_0x7f7ece304630 .scope module, "lm" "lm" 2 1;
.timescale 0 0; .timescale 0 0;
.port_info 0 /INPUT 8 "x"; .port_info 0 /INPUT 8 "x";
.port_info 1 /INPUT 8 "y"; .port_info 1 /INPUT 8 "y";
@ -27,46 +27,46 @@ S_00000256bb3769e0 .scope module, "lm" "lm" 2 1;
.port_info 15 /OUTPUT 1 "o11"; .port_info 15 /OUTPUT 1 "o11";
.port_info 16 /OUTPUT 1 "o10"; .port_info 16 /OUTPUT 1 "o10";
.port_info 17 /OUTPUT 1 "o9"; .port_info 17 /OUTPUT 1 "o9";
o00000256bb3c72f8 .functor BUFZ 8, C4<zzzzzzzz>; HiZ drive o0x7f7ece132368 .functor BUFZ 8, C4<zzzzzzzz>; HiZ drive
L_00000256bb3c47f0 .functor BUFZ 8, o00000256bb3c72f8, C4<00000000>, C4<00000000>, C4<00000000>; L_0x7f7ece316040 .functor BUFZ 8, o0x7f7ece132368, C4<00000000>, C4<00000000>, C4<00000000>;
o00000256bb3c7328 .functor BUFZ 8, C4<zzzzzzzz>; HiZ drive o0x7f7ece132398 .functor BUFZ 8, C4<zzzzzzzz>; HiZ drive
L_00000256bb376ca0 .functor NOT 8, o00000256bb3c7328, C4<00000000>, C4<00000000>, C4<00000000>; L_0x7f7ece316500 .functor NOT 8, o0x7f7ece132398, C4<00000000>, C4<00000000>, C4<00000000>;
v00000256bb3b47a0_0 .net *"_ivl_10", 7 0, L_00000256bb3c47f0; 1 drivers v0x7f7ece3049f0_0 .net *"_ivl_10", 7 0, L_0x7f7ece316040; 1 drivers
v00000256bb3b5100_0 .net *"_ivl_20", 7 0, L_00000256bb376ca0; 1 drivers v0x7f7ece314a70_0 .net *"_ivl_20", 7 0, L_0x7f7ece316500; 1 drivers
v00000256bb3b4340_0 .net "o1", 0 0, L_00000256bb412e40; 1 drivers v0x7f7ece314b10_0 .net "o1", 0 0, L_0x7f7ece315c80; 1 drivers
v00000256bb3b43e0_0 .net "o10", 0 0, L_00000256bb413a20; 1 drivers v0x7f7ece314bc0_0 .net "o10", 0 0, L_0x7f7ece316460; 1 drivers
v00000256bb3b4980_0 .net "o11", 0 0, L_00000256bb413660; 1 drivers v0x7f7ece314c50_0 .net "o11", 0 0, L_0x7f7ece316240; 1 drivers
v00000256bb3b4480_0 .net "o12", 0 0, L_00000256bb412a80; 1 drivers v0x7f7ece314d30_0 .net "o12", 0 0, L_0x7f7ece315b60; 1 drivers
v00000256bb3b4a20_0 .net "o13", 0 0, L_00000256bb413020; 1 drivers v0x7f7ece314dd0_0 .net "o13", 0 0, L_0x7f7ece316730; 1 drivers
v00000256bb3b4ac0_0 .net "o14", 0 0, L_00000256bb4124e0; 1 drivers v0x7f7ece314e70_0 .net "o14", 0 0, L_0x7f7ece315a20; 1 drivers
v00000256bb412b20_0 .net "o15", 0 0, L_00000256bb4130c0; 1 drivers v0x7f7ece314f10_0 .net "o15", 0 0, L_0x7f7ece3161a0; 1 drivers
v00000256bb412da0_0 .net "o16", 0 0, L_00000256bb412c60; 1 drivers v0x7f7ece315020_0 .net "o16", 0 0, L_0x7f7ece3160b0; 1 drivers
v00000256bb412580_0 .net "o2", 0 0, L_00000256bb413340; 1 drivers v0x7f7ece3150b0_0 .net "o2", 0 0, L_0x7f7ece315dc0; 1 drivers
v00000256bb412940_0 .net "o3", 0 0, L_00000256bb412d00; 1 drivers v0x7f7ece315150_0 .net "o3", 0 0, L_0x7f7ece316610; 1 drivers
v00000256bb412ee0_0 .net "o4", 0 0, L_00000256bb413840; 1 drivers v0x7f7ece3151f0_0 .net "o4", 0 0, L_0x7f7ece316570; 1 drivers
v00000256bb413ac0_0 .net "o5", 0 0, L_00000256bb4126c0; 1 drivers v0x7f7ece315290_0 .net "o5", 0 0, L_0x7f7ece315ea0; 1 drivers
v00000256bb413200_0 .net "o6", 0 0, L_00000256bb4135c0; 1 drivers v0x7f7ece315330_0 .net "o6", 0 0, L_0x7f7ece316340; 1 drivers
v00000256bb4129e0_0 .net "o7", 0 0, L_00000256bb412620; 1 drivers v0x7f7ece3153d0_0 .net "o7", 0 0, L_0x7f7ece315d20; 1 drivers
v00000256bb412760_0 .net "o8", 0 0, L_00000256bb413520; 1 drivers v0x7f7ece315470_0 .net "o8", 0 0, L_0x7f7ece315ac0; 1 drivers
v00000256bb412bc0_0 .net "o9", 0 0, L_00000256bb413980; 1 drivers v0x7f7ece315600_0 .net "o9", 0 0, L_0x7f7ece315980; 1 drivers
v00000256bb412f80_0 .net "x", 7 0, o00000256bb3c72f8; 0 drivers v0x7f7ece315690_0 .net "x", 7 0, o0x7f7ece132368; 0 drivers
v00000256bb412300_0 .net "y", 7 0, o00000256bb3c7328; 0 drivers v0x7f7ece315720_0 .net "y", 7 0, o0x7f7ece132398; 0 drivers
L_00000256bb413980 .part L_00000256bb3c47f0, 7, 1; L_0x7f7ece315980 .part L_0x7f7ece316040, 7, 1;
L_00000256bb4124e0 .part L_00000256bb3c47f0, 6, 1; L_0x7f7ece315a20 .part L_0x7f7ece316040, 6, 1;
L_00000256bb413520 .part L_00000256bb3c47f0, 5, 1; L_0x7f7ece315ac0 .part L_0x7f7ece316040, 5, 1;
L_00000256bb412a80 .part L_00000256bb3c47f0, 4, 1; L_0x7f7ece315b60 .part L_0x7f7ece316040, 4, 1;
L_00000256bb412e40 .part L_00000256bb3c47f0, 3, 1; L_0x7f7ece315c80 .part L_0x7f7ece316040, 3, 1;
L_00000256bb412620 .part L_00000256bb3c47f0, 2, 1; L_0x7f7ece315d20 .part L_0x7f7ece316040, 2, 1;
L_00000256bb413340 .part L_00000256bb3c47f0, 1, 1; L_0x7f7ece315dc0 .part L_0x7f7ece316040, 1, 1;
L_00000256bb4126c0 .part L_00000256bb3c47f0, 0, 1; L_0x7f7ece315ea0 .part L_0x7f7ece316040, 0, 1;
L_00000256bb412c60 .part L_00000256bb376ca0, 7, 1; L_0x7f7ece3160b0 .part L_0x7f7ece316500, 7, 1;
L_00000256bb4130c0 .part L_00000256bb376ca0, 6, 1; L_0x7f7ece3161a0 .part L_0x7f7ece316500, 6, 1;
L_00000256bb413660 .part L_00000256bb376ca0, 5, 1; L_0x7f7ece316240 .part L_0x7f7ece316500, 5, 1;
L_00000256bb4135c0 .part L_00000256bb376ca0, 4, 1; L_0x7f7ece316340 .part L_0x7f7ece316500, 4, 1;
L_00000256bb413a20 .part L_00000256bb376ca0, 3, 1; L_0x7f7ece316460 .part L_0x7f7ece316500, 3, 1;
L_00000256bb413840 .part L_00000256bb376ca0, 2, 1; L_0x7f7ece316570 .part L_0x7f7ece316500, 2, 1;
L_00000256bb412d00 .part L_00000256bb376ca0, 1, 1; L_0x7f7ece316610 .part L_0x7f7ece316500, 1, 1;
L_00000256bb413020 .part L_00000256bb376ca0, 0, 1; L_0x7f7ece316730 .part L_0x7f7ece316500, 0, 1;
# The file index is used to find the file name in the following table. # The file index is used to find the file name in the following table.
:file_names 3; :file_names 3;
"N/A"; "N/A";

@ -0,0 +1,90 @@
`timescale 1ns/1ns
module tb_lm();
reg k_1;
reg k_2;
reg flag; // 500ns
reg sys_clk;
reg sys_rst;
always #10 sys_clk = ~sys_clk;
initial begin
sys_clk <= 1'b0;
sys_rst <= 1'b0;
#200
sys_rst <= 1'b1;
{k_2, k_1} <= 2'b10;
#4000
{k_2, k_1} <= 2'b01;
#4000
{k_2, k_1} <= 2'b00;
end
reg [5:0] CNT;
always @(posedge sys_clk or negedge sys_rst) begin
if (sys_rst == 1'b0) begin
CNT <= 5'd0;
end
else if (CNT < (5'd25 - 5'd1)) begin
CNT <= CNT + 5'd1;
end
else begin
CNT <= 5'b0;
end
end
reg [7:0]x;
reg [7:0]y;
always @(posedge sys_clk or negedge sys_rst) begin
if (sys_rst == 1'b0) begin
k_1 <= 1'b0;
k_2 <= 1'b0;
x <= 8'b00000000;
y <= 8'b11111111; //
end
else if ({k_2, k_1} == 2'b10) begin
case (flag)
1'b0: x <= 8'b1010_1010;
1'b1: x <= 8'b0101_0101;
endcase
end
else if ({k_2, k_1} == 2'b01) begin
case (flag)
1'b0: x <= 8'b1111_0000;
1'b1: x <= 8'b0000_1111;
endcase
end
else begin
x <= 8'b00000000;
end
end
always @(posedge sys_clk or negedge sys_rst) begin
if (sys_rst == 1'b0) begin
flag <= 1'b0;
end
else if (CNT == (5'd25 - 5'd1)) begin
flag <= !flag;
end
else begin
end
end
lm u_lm(
.x (x),
.y (y)
);
endmodule

@ -0,0 +1,167 @@
#! /usr/local/Cellar/icarus-verilog/12.0/bin/vvp
:ivl_version "12.0 (stable)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision - 9;
:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/system.vpi";
:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/vhdl_sys.vpi";
:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/vhdl_textio.vpi";
:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/v2005_math.vpi";
:vpi_module "/usr/local/Cellar/icarus-verilog/12.0/lib/ivl/va_math.vpi";
S_0x7fb95300a8d0 .scope module, "tb_lm" "tb_lm" 2 3;
.timescale -9 -9;
v0x7fb953008920_0 .var "CNT", 5 0;
v0x7fb95301a6d0_0 .var "flag", 0 0;
v0x7fb95301a770_0 .var "k_1", 0 0;
v0x7fb95301a800_0 .var "k_2", 0 0;
v0x7fb95301a8a0_0 .var "sys_clk", 0 0;
v0x7fb95301a980_0 .var "sys_rst", 0 0;
v0x7fb95301aa20_0 .var "x", 7 0;
v0x7fb95301aad0_0 .var "y", 7 0;
E_0x7fb9530086e0/0 .event negedge, v0x7fb95301a980_0;
E_0x7fb9530086e0/1 .event posedge, v0x7fb95301a8a0_0;
E_0x7fb9530086e0 .event/or E_0x7fb9530086e0/0, E_0x7fb9530086e0/1;
.scope S_0x7fb95300a8d0;
T_0 ;
%delay 10, 0;
%load/vec4 v0x7fb95301a8a0_0;
%inv;
%store/vec4 v0x7fb95301a8a0_0, 0, 1;
%jmp T_0;
.thread T_0;
.scope S_0x7fb95300a8d0;
T_1 ;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x7fb95301a8a0_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x7fb95301a980_0, 0;
%delay 200, 0;
%pushi/vec4 1, 0, 1;
%assign/vec4 v0x7fb95301a980_0, 0;
%end;
.thread T_1;
.scope S_0x7fb95300a8d0;
T_2 ;
%wait E_0x7fb9530086e0;
%load/vec4 v0x7fb95301a980_0;
%cmpi/e 0, 0, 1;
%jmp/0xz T_2.0, 4;
%pushi/vec4 0, 0, 6;
%assign/vec4 v0x7fb953008920_0, 0;
%jmp T_2.1;
T_2.0 ;
%load/vec4 v0x7fb953008920_0;
%cmpi/u 24, 0, 6;
%jmp/0xz T_2.2, 5;
%load/vec4 v0x7fb953008920_0;
%addi 1, 0, 6;
%assign/vec4 v0x7fb953008920_0, 0;
%jmp T_2.3;
T_2.2 ;
%pushi/vec4 0, 0, 6;
%assign/vec4 v0x7fb953008920_0, 0;
T_2.3 ;
T_2.1 ;
%jmp T_2;
.thread T_2;
.scope S_0x7fb95300a8d0;
T_3 ;
%wait E_0x7fb9530086e0;
%load/vec4 v0x7fb95301a980_0;
%cmpi/e 0, 0, 1;
%jmp/0xz T_3.0, 4;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x7fb95301a770_0, 0;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x7fb95301a800_0, 0;
%pushi/vec4 0, 0, 8;
%assign/vec4 v0x7fb95301aa20_0, 0;
%pushi/vec4 255, 0, 8;
%assign/vec4 v0x7fb95301aad0_0, 0;
%jmp T_3.1;
T_3.0 ;
%load/vec4 v0x7fb95301a800_0;
%load/vec4 v0x7fb95301a770_0;
%concat/vec4; draw_concat_vec4
%cmpi/e 2, 0, 2;
%jmp/0xz T_3.2, 4;
%load/vec4 v0x7fb95301a6d0_0;
%dup/vec4;
%pushi/vec4 0, 0, 1;
%cmp/u;
%jmp/1 T_3.4, 6;
%dup/vec4;
%pushi/vec4 1, 0, 1;
%cmp/u;
%jmp/1 T_3.5, 6;
%jmp T_3.6;
T_3.4 ;
%pushi/vec4 170, 0, 8;
%assign/vec4 v0x7fb95301aa20_0, 0;
%jmp T_3.6;
T_3.5 ;
%pushi/vec4 85, 0, 8;
%assign/vec4 v0x7fb95301aa20_0, 0;
%jmp T_3.6;
T_3.6 ;
%pop/vec4 1;
%jmp T_3.3;
T_3.2 ;
%load/vec4 v0x7fb95301a800_0;
%load/vec4 v0x7fb95301a770_0;
%concat/vec4; draw_concat_vec4
%cmpi/e 1, 0, 2;
%jmp/0xz T_3.7, 4;
%load/vec4 v0x7fb95301a6d0_0;
%dup/vec4;
%pushi/vec4 0, 0, 1;
%cmp/u;
%jmp/1 T_3.9, 6;
%dup/vec4;
%pushi/vec4 1, 0, 1;
%cmp/u;
%jmp/1 T_3.10, 6;
%jmp T_3.11;
T_3.9 ;
%pushi/vec4 240, 0, 8;
%assign/vec4 v0x7fb95301aa20_0, 0;
%jmp T_3.11;
T_3.10 ;
%pushi/vec4 15, 0, 8;
%assign/vec4 v0x7fb95301aa20_0, 0;
%jmp T_3.11;
T_3.11 ;
%pop/vec4 1;
%jmp T_3.8;
T_3.7 ;
%pushi/vec4 0, 0, 8;
%assign/vec4 v0x7fb95301aa20_0, 0;
T_3.8 ;
T_3.3 ;
T_3.1 ;
%jmp T_3;
.thread T_3;
.scope S_0x7fb95300a8d0;
T_4 ;
%wait E_0x7fb9530086e0;
%load/vec4 v0x7fb95301a980_0;
%cmpi/e 0, 0, 1;
%jmp/0xz T_4.0, 4;
%pushi/vec4 0, 0, 1;
%assign/vec4 v0x7fb95301a6d0_0, 0;
%jmp T_4.1;
T_4.0 ;
%load/vec4 v0x7fb953008920_0;
%cmpi/e 24, 0, 6;
%jmp/0xz T_4.2, 4;
%load/vec4 v0x7fb95301a6d0_0;
%nor/r;
%assign/vec4 v0x7fb95301a6d0_0, 0;
T_4.2 ;
T_4.1 ;
%jmp T_4;
.thread T_4;
# The file index is used to find the file name in the following table.
:file_names 3;
"N/A";
"<interactive>";
"tb_lm.v";
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